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v1.4.0

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@dpretet dpretet released this 26 Jun 16:29
· 58 commits to master since this release

Misc. code updates and simplification to enhance performance.

  • control is simpler and can flush request and reboot on same cycle.
  • separates block fetcher and prefetch on cache miss
  • simplify icache sequencer
  • CSR executes in one cycle
  • processing schedules multiples instructions in same cycles if no hazards
  • memfy better manages outstanding requests