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Issue #1: Concurrent read/write access #201

Issue #1: Concurrent read/write access

Issue #1: Concurrent read/write access #201

Workflow file for this run

name: FRISCV
on: [push]
jobs:
Lint:
runs-on: macos-latest
steps:
- uses: actions/checkout@v2
- run: brew install verilator
- run: ./flow.sh lint
Synthesis:
runs-on: macos-latest
steps:
- uses: actions/checkout@v2
- run: brew install yosys
- run: ./flow.sh syn
WBA-testsuite:
runs-on: macos-latest
steps:
- uses: actions/checkout@v2
- run: brew install icarus-verilog
- run: iverilog -V
- run: brew install verilator
- run: verilator -V
- run: brew install md5sha1sum
- run: git submodule update --init --recursive
- run: ./flow.sh sim wba-testsuite core icarus
- run: ./flow.sh sim wba-testsuite core verilator
- run: ./flow.sh sim wba-testsuite platform icarus
- run: ./flow.sh sim wba-testsuite platform verilator
RISCV-Compliance:
runs-on: macos-latest
steps:
- uses: actions/checkout@v2
- run: brew install icarus-verilog
- run: iverilog -V
- run: brew install verilator
- run: verilator -V
- run: brew install md5sha1sum
- run: git submodule update --init --recursive
- run: ./flow.sh sim riscv-testsuite core icarus
- run: ./flow.sh sim riscv-testsuite core verilator
- run: ./flow.sh sim riscv-testsuite platform icarus
- run: ./flow.sh sim riscv-testsuite platform verilator
C-testsuite:
runs-on: macos-latest
steps:
- uses: actions/checkout@v2
- run: brew install icarus-verilog
- run: iverilog -V
- run: brew install verilator
- run: verilator -V
- run: brew install md5sha1sum
- run: git submodule update --init --recursive
- run: ./flow.sh sim c-testsuite core icarus
- run: ./flow.sh sim c-testsuite core verilator
- run: ./flow.sh sim c-testsuite platform icarus
- run: ./flow.sh sim c-testsuite
SV-testsuite:
runs-on: macos-latest
steps:
- uses: actions/checkout@v2
- run: brew install icarus-verilog
- run: iverilog -V
- run: brew install verilator
- run: verilator -V
- run: git submodule update --init --recursive
- run: ./flow.sh sim sv-testsuite icache
- run: ./flow.sh sim sv-testsuite dcache