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ReleaseNotes_2_1_0
May 28, 2010
Initial support has been added for Xilinx ISim. Support for ISim should currently be considered "beta" right now -- if you encounter any problems please let us know so that we can fix them. Missing from ISim support is the ability to run the simulator in GUI mode/dump waveforms into a file.
Please note that ISim simulations require the use of ISE 10.1 with service pack 3 and IP update 3 installed. Failure to install the service pack/IP update is likely to result in failure of simulations.
The driver has been updated to support newer kernel versions (up to 2.6.31).
Various minor improvements and fixes have been made to the register system. Most of these changes focus on exporting more information to C and Perl programs. See the Register system changes section below for information on backward compatibility.
The 2.1.0 release introduces a number of changes that will require existing projects to be updated. The biggest changes in this release relate to the renaming of the NetFPGA directory and the various tools (eg. download, simulation, verification). These changes were made in preparation for inclusion of code for the NetFPGA-10G project. This section attempts to summarize the main outward-facing changes.
The NetFPGA source directory name has changed from NF2 to netfpga.
The environment variable names have changed as follows:
| Old Variable Name | New Variable Name |
| NF2_ROOT | NF_ROOT |
| NF2_DESIGN_DIR | NF_DESIGN_DIR |
|
NF2_WORK_DIR (Not always set)
|
NF_WORK_DIR |
The nf2 prefix on utilities and scripts has been replaced with nf. (Eg. the download utility is now named nf_download.)
Device ID information is now specified in the project.xml file. The Device ID module has been updated to include additional information. The following information is reported for each design:
| Information | XML tag | Comment |
| Project name | nf:name | |
| Project description | nf:description | |
| Project directory | Automatically identified | |
| Project version |
nf:version_major nf:version_minor nf:version_revision |
Version number as a triplet of major, minor and revision |
| Device ID | nf:dev_id | Device IDs should be unique for all published projects. Register device IDs in the Device ID List |
| CPCI version | Set to the CPCI version compiled against |
A number of bug fixes and improvements have been made to the register system. Most of these changes should not require any updates for your code.
You may need to update your Verilog code if you've used types with bitmasks. Bitmask names in registers.v now have the suffix _POS appended to them to indicate that they correspond to a bit position. Related to this, the generated C and Perl files now include bitmask information.
A new script is included in the netfpga/bin directory to make upgrading a little easier. It runs through all of the directories inside a NetFPGA source tree and replaces all references to the Perl NF2 package, updates references to the environment variables ( NF2_ROOT, NF2_WORK_DIR, NF2_DESIGN_DIR), and attempts to merge a project's dev_id.v file into the project.xml file.
%RED%Create a backup of your source tree before running the script.%ENDCOLOR%
To run the script, set the NF_ROOT environment variable to point to your source tree and then run:
nf_upgrade_files.pl
The source code repository has been converted to git and is now publicly available. You can clone the repository via: git clone git://netfpga.org/netfpga.git or via gitweb: http://yuba.stanford.edu/git/gitweb.cgi?p=netfpga.git;a=summary
We encourage developers who wish to improve the base NetFPGA system to download the git repository and submit patches.
- Register system:
- project name included in the #define at the top of the C header file, allowing the inclusion of multiple header files
- device ID info (version, name, desc) now specified in project.xml
- provide more information in headers at the top of generated files
- output bitmasks in C/Perl
- device_id module updated to include proj name, desc, and directory
- nf2_info utility updated and installed by default (reads the device ID info from the active bitfile)
- Moved contributed code out of lib/verilog/core
- Added regression tests for the reference switch
- Packaging scripts:
- Verilog modules can be excluded
- support added for git repositories
- Selftest:
- uses new register system
- software verifies that the bitfile is downloaded before running the test
- Types added for CPCI registers with bitmasks
- Added functions to C common library:
- read device ID register
- verify that the correct bitfile is downloaded
- Kernel module:
- added basic ethtool support (Thanks to Kumar Sanghvi)
- added mii-tool support (Thanks to Kumar Sanghvi)
- support newer Linux kernels (net_device API deprecated) (Thanks to Paul Rodman & Maciej Żenczykowski @ Google)
- DRAM related:
- DRAM block read/write test, DRAM queue test (1 queue), DRAM router (8 queue) now released as full source code
- Several timing improvement to make the DRAM related modules faster
- Simulations:
- verify that the correct number of register reads is performed
- supports Xilinx ISim in addition to ModelSim and VCS
- numerous fixes to register system:
- incorrectly output of instance block addresses
- replace periods with underscores in identifier names
- cpci_download:
- should work correctly on Fedora systems (Thanks to Paul Rodman)
- CPCI project renamed: CPCI_2.1 -> cpci
- CPCI PERL library updated: CPCI_21Lib.pm -> CPCI_Lib.pm
- Preparation for 10G system:
- Perl NF2 library renamed to NF
- nf2 replaced with nf in utility names (eg. nf_download)
- NetFPGA directory renamed to netfpga (instead of NF2)