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RISCV: fix PMP stack guard not active during boot #75622

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Jul 11, 2024
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1 change: 0 additions & 1 deletion arch/riscv/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -30,7 +30,6 @@ config RISCV_GP
config RISCV_ALWAYS_SWITCH_THROUGH_ECALL
bool "Do not use mret outside a trap handler context"
depends on MULTITHREADING
depends on !RISCV_PMP
help
Use mret instruction only when in a trap handler.
This is for RISC-V implementations that require every mret to be
Expand Down
72 changes: 51 additions & 21 deletions arch/riscv/core/pmp.c
Original file line number Diff line number Diff line change
Expand Up @@ -204,6 +204,34 @@ static bool set_pmp_entry(unsigned int *index_p, uint8_t perm,
return ok;
}

static inline bool set_pmp_mprv_catchall(unsigned int *index_p,
unsigned long *pmp_addr, unsigned long *pmp_cfg,
unsigned int index_limit)
{
/*
* We'll be using MPRV. Make a fallback entry with everything
* accessible as if no PMP entries were matched which is otherwise
* the default behavior for m-mode without MPRV.
*/
bool ok = set_pmp_entry(index_p, PMP_R | PMP_W | PMP_X,
0, 0, pmp_addr, pmp_cfg, index_limit);

#ifdef CONFIG_QEMU_TARGET
if (ok) {
/*
* Workaround: The above produced 0x1fffffff which is correct.
* But there is a QEMU bug that prevents it from interpreting
* this value correctly. Hardcode the special case used by
* QEMU to bypass this bug for now. The QEMU fix is here:
* https://lists.gnu.org/archive/html/qemu-devel/2022-04/msg00961.html
*/
pmp_addr[*index_p - 1] = -1L;
}
#endif

return ok;
}

/**
* @brief Write a range of PMP entries to corresponding PMP registers
*
Expand Down Expand Up @@ -320,8 +348,8 @@ static unsigned int global_pmp_end_index;
*/
void z_riscv_pmp_init(void)
{
unsigned long pmp_addr[4];
unsigned long pmp_cfg[1];
unsigned long pmp_addr[5];
unsigned long pmp_cfg[2];
unsigned int index = 0;

/* The read-only area is always there for every mode */
Expand Down Expand Up @@ -351,10 +379,28 @@ void z_riscv_pmp_init(void)
(uintptr_t)z_interrupt_stacks[_current_cpu->id],
Z_RISCV_STACK_GUARD_SIZE,
pmp_addr, pmp_cfg, ARRAY_SIZE(pmp_addr));
#endif

/*
* This early, the kernel init code uses the IRQ stack and we want to
* safeguard it as soon as possible. But we need a temporary default
* "catch all" PMP entry for MPRV to work. Later on, this entry will
* be set for each thread by z_riscv_pmp_stackguard_prepare().
*/
set_pmp_mprv_catchall(&index, pmp_addr, pmp_cfg, ARRAY_SIZE(pmp_addr));

/* Write those entries to PMP regs. */
write_pmp_entries(0, index, true, pmp_addr, pmp_cfg, ARRAY_SIZE(pmp_addr));

/* Activate our non-locked PMP entries for m-mode */
csr_set(mstatus, MSTATUS_MPRV);

/* And forget about that last entry as we won't need it later */
index--;
#else
/* Write those entries to PMP regs. */
write_pmp_entries(0, index, true, pmp_addr, pmp_cfg, ARRAY_SIZE(pmp_addr));
#endif

#ifdef CONFIG_SMP
#ifdef CONFIG_PMP_STACK_GUARD
/*
Expand All @@ -373,6 +419,7 @@ void z_riscv_pmp_init(void)
}
#endif

__ASSERT(index <= PMPCFG_STRIDE, "provision for one global word only");
global_pmp_cfg[0] = pmp_cfg[0];
global_pmp_last_addr = pmp_addr[index - 1];
global_pmp_end_index = index;
Expand Down Expand Up @@ -429,24 +476,7 @@ void z_riscv_pmp_stackguard_prepare(struct k_thread *thread)
set_pmp_entry(&index, PMP_NONE,
stack_bottom, Z_RISCV_STACK_GUARD_SIZE,
PMP_M_MODE(thread));

/*
* We'll be using MPRV. Make a fallback entry with everything
* accessible as if no PMP entries were matched which is otherwise
* the default behavior for m-mode without MPRV.
*/
set_pmp_entry(&index, PMP_R | PMP_W | PMP_X,
0, 0, PMP_M_MODE(thread));
#ifdef CONFIG_QEMU_TARGET
/*
* Workaround: The above produced 0x1fffffff which is correct.
* But there is a QEMU bug that prevents it from interpreting this
* value correctly. Hardcode the special case used by QEMU to
* bypass this bug for now. The QEMU fix is here:
* https://lists.gnu.org/archive/html/qemu-devel/2022-04/msg00961.html
*/
thread->arch.m_mode_pmpaddr_regs[index-1] = -1L;
#endif
set_pmp_mprv_catchall(&index, PMP_M_MODE(thread));

/* remember how many entries we use */
thread->arch.m_mode_pmp_end_index = index;
Expand Down
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