boards: arm: Add initial support for Renesas EK-RA2A1

boards/renesas/ek_ra2a1/Kconfig.ek_ra2a1

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+# Copyright (c) 2024 TOKITA Hiroshi
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_EK_RA2A1
+	select SOC_R7FA2A1AB3CFM

boards/renesas/ek_ra2a1/board.cmake

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+# Copyright (c) 2024 TOKITA Hiroshi
+# SPDX-License-Identifier: Apache-2.0
+
+board_runner_args(jlink "--device=R7FA2A1AB")
+
+board_runner_args(pyocd "--target=r7fa2a1ab")
+
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)

boards/renesas/ek_ra2a1/board.yml

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+board:
+  name: ek_ra2a1
+  vendor: renesas
+  socs:
+  - name: r7fa2a1ab3cfm

boards/renesas/ek_ra2a1/doc/index.rst

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+.. _ek_ra2a1:
+
+RA2A1 Evaluation Kit
+####################
+
+Overview
+********
+
+The EK-RA2A1 is an evaluation kit for Renesas RA2A1 Microcontroller Group.
+
+Renesas RA2A1 Microcontroller Group has following features
+
+- 48MHz, Arm Cortex-M23 core
+- 256kB Code Flash, 8kB Data Flash, 32kB SRAM
+- USB 2.0 Full-Sppeed
+- SCI x 3
+- SPI x 2
+- I2C x 2
+- CAN x 1
+- 16-bit A/D Converter
+- 24-bit Sigma-Delta A/D Converter
+- 12-bit D/A Converter
+- 8-bit D/A Converter x 2
+- High-Speed Analog Comparator
+- Low-Power Analog Comparator
+- OPAMP x 3
+- Temperature Sensor
+- General PWM Timer 32-bit x 1
+- General PWM Timer 16-bit x 6
+- Low Power Asynchronous General-Purpose Timer x 2
+- Watchdog Timer
+- 49 Input/Output pins
+
+Hardware
+********
+
+EK-RA2A1 has following features.
+
+- Native pin access through 4x 40-pin male headers
+- MCU current measurement points
+- SEGGER J-Link on-board programmer and debugger
+- Two Digilent Pmod (SPI and UART)
+- User LED
+- Mechanical user button
+- Capacitive user button
+
+Supported Features
+==================
+
+The Renesas EK-RA2A1 board configuration supports the following
+hardware features:
+
++-----------+------------+-------------------------------+
+| Interface | Controller | Driver/components             |
++===========+============+===============================+
+| PINCTRL   | on-chip    | pinctrl                       |
++-----------+------------+-------------------------------+
+| CLOCK     | on-chip    | clock_control                 |
++-----------+------------+-------------------------------+
+| GPIO      | on-chip    | gpio                          |
++-----------+------------+-------------------------------+
+| UART      | on-chip    | uart                          |
++-----------+------------+-------------------------------+
+
+The default configuration can be found in
+:zephyr_file:`boards/renesas/ek_ra2a1/ek_ra2a1_defconfig`
+
+
+Programming and debugging
+*************************
+
+Building & Flashing
+===================
+
+You can build and flash an application with onboard J-Link debug adapter.
+:ref:`build_an_application` and
+:ref:`application_run` for more details).
+
+Here is an example for building and flashing the :zephyr:code-sample:`blinky` application.
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/basic/blinky
+   :board: ek_ra2a1
+   :goals: build flash
+
+
+Debugging
+=========
+
+Debugging also can be done with onboard J-Link debug adapter.
+The following command is debugging the :zephyr:code-sample:`blinky` application.
+Also, see the instructions specific to the debug server that you use.
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/basic/blinky
+   :board: ek_ra2a1
+   :maybe-skip-config:
+   :goals: debug
+
+
+References
+**********
+
+.. EK-RA2A1 Web site:
+   https://www.renesas.com/us/en/products/microcontrollers-microprocessors/ra-cortex-m-mcus/ek-ra2a1-evaluation-kit-ra2a1-mcu-group

boards/renesas/ek_ra2a1/ek_ra2a1-pinctrl.dtsi

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+/*
+ * Copyright (c) 2024 TOKITA Hiroshi
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+&pinctrl {
+	sci0_default: sci0_default {
+		group1 {
+			/* rx */
+			psels = <RA_PSEL(RA_PSEL_SCI_0, 3, 1)>;
+		};
+		group2 {
+			/* tx */
+			psels = <RA_PSEL(RA_PSEL_SCI_0, 3, 2)>;
+			drive-strength = "medium";
+		};
+	};
+};

boards/renesas/ek_ra2a1/ek_ra2a1.dts

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+/*
+ * Copyright (c) 2024 TOKITA Hiroshi
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+
+#include <renesas/ra/ra2/r7fa2a1ab3cfm.dtsi>
+#include <zephyr/dt-bindings/gpio/gpio.h>
+
+#include "ek_ra2a1-pinctrl.dtsi"
+
+/ {
+	model = "Renesas EK-RA2A1";
+	compatible = "renesas,ra2a1", "renesas,ra2";
+
+	chosen {
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+		zephyr,console = &uart0;
+		zephyr,shell-uart = &uart0;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		led1: led1 {
+			gpios = <&ioport2 5 GPIO_ACTIVE_HIGH>;
+			label = "LED1";
+		};
+	};
+
+	aliases {
+		led0 = &led1;
+	};
+};
+
+&xtal {
+	clock-frequency = <DT_FREQ_M(12)>;
+	mosel = <0>;
+	#clock-cells = <0>;
+	status = "okay";
+};
+
+&subclk {
+	status = "okay";
+};
+
+&ioport2 {
+	status = "okay";
+};
+
+&sci0 {
+	pinctrl-0 = <&sci0_default>;
+	pinctrl-names = "default";
+	status = "okay";
+	uart0: uart {
+		current-speed = <115200>;
+		status = "okay";
+	};
+};

boards/renesas/ek_ra2a1/ek_ra2a1.yaml

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+identifier: ek_ra2a1
+name: Renesas EK-RA2A1
+type: mcu
+arch: arm
+ram: 32
+flash: 256
+toolchain:
+  - zephyr
+  - gnuarmemb
+supported:
+  - gpio
+  - uart

boards/renesas/ek_ra2a1/ek_ra2a1_defconfig

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+# Copyright (c) 2024 TOKITA Hiroshi
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
+
+# Enable GPIO
+CONFIG_GPIO=y
+CONFIG_PINCTRL=y
+
+# Enable Console
+CONFIG_SERIAL=y
+CONFIG_UART_CONSOLE=y
+CONFIG_UART_INTERRUPT_DRIVEN=y
+CONFIG_CONSOLE=y
+
+CONFIG_BUILD_OUTPUT_HEX=y
+CONFIG_BUILD_NO_GAP_FILL=y
+CONFIG_CLOCK_CONTROL=y

dts/arm/renesas/ra/ra2/r7fa2a1ab3cfm.dtsi

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+/*
+ * Copyright (c) 2024 TOKITA Hiroshi
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <arm/renesas/ra/ra2/r7fa2a1xh.dtsi>
+
+/ {
+	soc {
+		flash-controller@407e0000 {
+			flash0: flash@0 {
+				compatible = "soc-nv-flash";
+				reg = <0x00000000 DT_SIZE_K(256)>;
+			};
+			flash1: flash@40100000 {
+				compatible = "soc-nv-flash";
+				reg = <0x40100000 DT_SIZE_K(8)>;
+			};
+		};
+	};
+};

dts/arm/renesas/ra/ra2/r7fa2a1xh.dtsi

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+/*
+ * Copyright (c) 2024 TOKITA Hiroshi
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <arm/renesas/ra/ra2/ra2xx.dtsi>
+#include <zephyr/dt-bindings/clock/ra_clock.h>
+
+/delete-node/ &sci2;
+/delete-node/ &sci3;
+/delete-node/ &ioport6;
+/delete-node/ &ioport7;
+/delete-node/ &ioport8;
+
+/ {
+	soc {
+		sram0: memory@20000000 {
+			compatible = "mmio-sram";
+			reg = <0x20000000 DT_SIZE_K(32)>;
+		};
+	};
+
+	clocks: clocks {
+		xtal: clock-xtal {
+			compatible = "renesas,ra-cgc-external-clock";
+			clock-frequency = <DT_FREQ_M(12)>;
+			#clock-cells = <0>;
+			status = "disabled";
+		};
+
+		hoco: clock-hoco {
+			compatible = "fixed-clock";
+			clock-frequency = <DT_FREQ_M(48)>;
+			#clock-cells = <0>;
+		};
+
+		moco: clock-moco {
+			compatible = "fixed-clock";
+			clock-frequency = <DT_FREQ_M(8)>;
+			#clock-cells = <0>;
+		};
+
+		loco: clock-loco {
+			compatible = "fixed-clock";
+			clock-frequency = <32768>;
+			#clock-cells = <0>;
+		};
+
+		subclk: clock-subclk {
+			compatible = "renesas,ra-cgc-subclk";
+			clock-frequency = <32768>;
+			#clock-cells = <0>;
+			status = "disabled";
+		};
+
+		pclkblock: pclkblock {
+			compatible = "renesas,ra-cgc-pclk-block";
+			#clock-cells = <0>;
+			sysclock-src = <RA_CLOCK_SOURCE_HOCO>;
+			status = "okay";
+
+			iclk: iclk {
+				compatible = "renesas,ra-cgc-pclk";
+				clk_div = <RA_SYS_CLOCK_DIV_1>;
+				#clock-cells = <2>;
+				status = "okay";
+			};
+
+			pclkb: pclkb {
+				compatible = "renesas,ra-cgc-pclk";
+				clk_div = <RA_SYS_CLOCK_DIV_2>;
+				#clock-cells = <2>;
+				status = "okay";
+			};
+
+			pclkd: pclkd {
+				compatible = "renesas,ra-cgc-pclk";
+				clk_div = <RA_SYS_CLOCK_DIV_1>;
+				#clock-cells = <2>;
+				status = "okay";
+			};
+
+			fclk: fclk {
+				compatible = "renesas,ra-cgc-pclk";
+				clk_div = <RA_SYS_CLOCK_DIV_1>;
+				#clock-cells = <2>;
+				status = "okay";
+			};
+
+			clkout: clkout {
+				compatible = "renesas,ra-cgc-pclk";
+				#clock-cells = <2>;
+				status = "disabled";
+			};
+
+
+			sdadcclk: sdadcclk {
+				compatible = "renesas,ra-cgc-pclk";
+				#clock-cells = <2>;
+				status = "disabled";
+			};
+		};
+	};
+};