boards: esp32: Add support for M5Stack AtomS3

boards/xtensa/m5stack_atoms3/Kconfig.board

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+# M5Stack AtomS3 board configuration
+
+# Copyright (c) 2023 Benjamin Cabé <[email protected]>
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_M5STACK_ATOMS3
+	bool "M5Stack AtomS3 Development Board"
+	depends on SOC_SERIES_ESP32S3
+
+choice SOC_PART_NUMBER
+	default SOC_ESP32S3_FN8
+endchoice

boards/xtensa/m5stack_atoms3/Kconfig.defconfig

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+# M5Stack AtomS3 board configuration
+# Copyright (c) 2023 Benjamin Cabé <[email protected]>
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_M5STACK_ATOMS3
+
+config BOARD
+	default "m5stack_atoms3"
+	depends on BOARD_M5STACK_ATOMS3
+
+config ENTROPY_GENERATOR
+	default y
+
+config HEAP_MEM_POOL_SIZE
+	default 98304 if WIFI
+	default 65536 if BT
+	default 4096
+
+config KERNEL_MEM_POOL
+	default y
+
+choice BT_HCI_BUS_TYPE
+	default BT_ESP32 if BT
+endchoice
+
+config LV_COLOR_16_SWAP
+	default y if LVGL
+
+endif # BOARD_M5STACK_ATOMS3

boards/xtensa/m5stack_atoms3/board.cmake

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+# SPDX-License-Identifier: Apache-2.0
+
+if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*")
+  set(OPENOCD OPENOCD-NOTFOUND)
+endif()
+find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH)
+
+include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)

boards/xtensa/m5stack_atoms3/doc/index.rst

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+.. _m5stack_atoms3:
+
+M5Stack AtomS3
+##############
+
+Overview
+********
+
+M5Stack AtomS3 is an ESP32-based development board from M5Stack.
+
+It features the following integrated components:
+
+- ESP32-S3FN8 chip (240MHz dual core, Wi-Fi/BLE 5.0)
+- 512KB of SRAM
+- 384KB of ROM
+- 8MB of Flash
+- LCD IPS TFT 0.85", 128x128 px screen (ST7789 compatible)
+- 6-axis IMU MPU6886
+- Infrared emitter
+
+
+.. figure:: img/m5stack_atoms3.webp
+        :align: center
+        :alt: M5Stack AtomS3
+
+        M5Stack AtomS3
+
+
+Supported Features
+==================
+
+The Zephyr m5stack_atoms3 board configuration supports the following hardware features:
+
++-----------+------------+-------------------------------------+
+| Interface | Controller | Driver/Component                    |
++===========+============+=====================================+
+| NVIC      | on-chip    | nested vector interrupt controller  |
++-----------+------------+-------------------------------------+
+| UART      | on-chip    | serial port-polling;                |
+|           |            | serial port-interrupt               |
++-----------+------------+-------------------------------------+
+| PINMUX    | on-chip    | pinmux                              |
++-----------+------------+-------------------------------------+
+| GPIO      | on-chip    | gpio                                |
++-----------+------------+-------------------------------------+
+| I2C       | on-chip    | i2c                                 |
++-----------+------------+-------------------------------------+
+| SPI       | on-chip    | spi                                 |
++-----------+------------+-------------------------------------+
+| CLOCK     | on-chip    | reset and clock control             |
++-----------+------------+-------------------------------------+
+| COUNTER   | on-chip    | rtc                                 |
++-----------+------------+-------------------------------------+
+| WATCHDOG  | on-chip    | independent watchdog                |
++-----------+------------+-------------------------------------+
+| PWM       | on-chip    | pwm                                 |
++-----------+------------+-------------------------------------+
+| ADC       | on-chip    | adc                                 |
++-----------+------------+-------------------------------------+
+| DAC       | on-chip    | dac                                 |
++-----------+------------+-------------------------------------+
+| die-temp  | on-chip    | die temperature sensor              |
++-----------+------------+-------------------------------------+
+
+
+Start Application Development
+*****************************
+
+Before powering up your M5Stack AtomS3, please make sure that the board is in good
+condition with no obvious signs of damage.
+
+System requirements
+===================
+
+Prerequisites
+-------------
+
+Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command
+below to retrieve those files.
+
+.. code-block:: shell
+
+   west blobs fetch hal_espressif
+
+.. note::
+
+   It is recommended running the command above after :file:`west update`.
+
+Building & Flashing
+-------------------
+
+Build and flash applications as usual (see :ref:`build_an_application` and
+:ref:`application_run` for more details).
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: m5stack_atoms3
+   :goals: build
+
+The usual ``flash`` target will work with the ``m5stack_atoms3`` board
+configuration. Here is an example for the :ref:`hello_world`
+application.
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: m5stack_atoms3
+   :goals: flash
+
+The baud rate of 921600bps is set by default. If experiencing issues when flashing,
+try using different values by using ``--esp-baud-rate <BAUD>`` option during
+``west flash`` (e.g. ``west flash --esp-baud-rate 115200``).
+
+You can also open the serial monitor using the following command:
+
+.. code-block:: shell
+
+   west espressif monitor
+
+After the board has automatically reset and booted, you should see the following
+message in the monitor:
+
+.. code-block:: console
+
+   ***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx *****
+   Hello World! m5stack_atoms3
+
+Debugging
+---------
+
+M5Stack AtomS3 debugging is not supported due to pinout limitations.
+
+Related Documents
+*****************
+
+- `M5Stack AtomS3 schematic <https://static-cdn.m5stack.com/resource/docs/products/core/AtomS3/img-b85e925c-adff-445d-994c-45987dc97a44.jpg>`_
+- `ESP32S3 Datasheet <https://www.espressif.com/sites/default/files/documentation/esp32-s3_datasheet_en.pdf>`_

boards/xtensa/m5stack_atoms3/grove_connectors.dtsi

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+/*
+ * Copyright (c) 2023 Benjamin Cabé <[email protected]>
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	grove_header: grove_header {
+		compatible = "grove-header";
+		#gpio-cells = <2>;
+		gpio-map-mask = <0xffffffff 0xffffffc0>;
+		gpio-map-pass-thru = <0 0x3f>;
+		gpio-map = <0 0 &gpio0 1 0>,
+			   <1 0 &gpio0 2 0>;
+	};
+};
+
+grove_i2c1: &i2c1 {};

boards/xtensa/m5stack_atoms3/m5stack_atoms3-pinctrl.dtsi

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+/*
+ * Copyright (c) 2023 Benjamin Cabé <[email protected]>
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+ #include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
+ #include <dt-bindings/pinctrl/esp32s3-pinctrl.h>
+ #include <zephyr/dt-bindings/pinctrl/esp32s3-gpio-sigmap.h>
+
+&pinctrl {
+	uart0_default: uart0_default {
+		 group1 {
+			 pinmux = <UART0_TX_GPIO43>;
+			 output-high;
+		 };
+		 group2 {
+			 pinmux = <UART0_RX_GPIO44>;
+			 bias-pull-up;
+		 };
+	 };
+
+	i2c0_default: i2c0_default {
+		group1 {
+			pinmux = <I2C0_SDA_GPIO38>,
+				 <I2C0_SCL_GPIO39>;
+			bias-pull-up;
+			drive-open-drain;
+			output-high;
+		};
+	};
+
+	i2c1_default: i2c1_default {
+		group1 {
+			pinmux = <I2C1_SDA_GPIO2>,
+				 <I2C1_SCL_GPIO1>;
+			bias-pull-up;
+			drive-open-drain;
+			output-high;
+		};
+	};
+
+	spim2_default: spim2_default {
+		group1 {
+			pinmux = <SPIM2_SCLK_GPIO17>,
+				 <SPIM2_CSEL_GPIO15>;
+		};
+		group2 {
+			pinmux = <SPIM2_MOSI_GPIO21>;
+			output-low;
+		};
+
+	};
+};