Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Fix clock constraints not affecting place_opt #836

Merged
merged 1 commit into from
Dec 15, 2023
Merged
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
10 changes: 5 additions & 5 deletions hammer/par/innovus/__init__.py
Original file line number Diff line number Diff line change
Expand Up @@ -519,16 +519,16 @@ def power_straps(self) -> bool:

def place_opt_design(self) -> bool:
"""Place the design and do pre-routing optimization."""
self.verbose_append("place_opt_design")
return True

def clock_tree(self) -> bool:
"""Setup and route a clock tree for clock nets."""
if self.hierarchical_mode.is_nonleaf_hierarchical():
self.verbose_append('''
flatten_ilm
update_constraint_mode -name my_constraint_mode -ilm_sdc_files {sdc}
'''.format(sdc=self.post_synth_sdc), clean=True)
self.verbose_append("place_opt_design")
return True

def clock_tree(self) -> bool:
"""Setup and route a clock tree for clock nets."""
if len(self.get_clock_ports()) > 0:
# Ignore clock tree when there are no clocks
# If special cells are specified, explicitly set them instead of letting tool infer from libs
Expand Down