Program and project level documentation for the OpenHW Group's set of CORE-V RISC-V cores.
Directory contents...
Architecture and Design documentation for the CORE-V cores. The readthedocs rendering of:
Verification Strategy, Verification Plans, Workflow plus meeting slides and minutes. The
readthedocs rendering of the CORE-V Verification Strategy can be viewed here.
Note: the source for this will be moving to core-v-verif in the not to distant future.
Information about the hardware and software of the physical platforms built to demonstrate the capabilities of the CORE-V cores. Coming soon.
If you find any problems or issues with the documentation, please check out the issue tracker and create a new issue if your problem is not yet tracked.
The flow, style, and parts of the content of the CV32E40P User Manual are based on the Ibex User Manual from lowRISC.