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  • Austin TX

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Popular repositories Loading

  1. core-v-verif core-v-verif Public

    Forked from openhwgroup/core-v-verif

    Functional verification project for the CORE-V family of RISC-V cores.

    Assembly 1

  2. core-v-docs core-v-docs Public

    Forked from openhwgroup/programs

    Documentation for the OpenHW Group's set of CORE-V RISC-V cores

    Python

  3. cv32e40p cv32e40p Public

    Forked from openhwgroup/cv32e40p

    CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform

    SystemVerilog

  4. covg_report covg_report Public

    JavaScript

  5. strichmo.github.io strichmo.github.io Public

    JavaScript

  6. riscv-formal riscv-formal Public

    Forked from SymbioticEDA/riscv-formal

    RISC-V Formal Verification Framework

    Verilog