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Interrupt ID ordering recommendations #219
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Please note that, when using vectored interrupts, in order to avoid unnecessary complexity in a scheduler, it is recommended to reserve the absolute lowest priority interrupt for context switching. This allows all other handlers to no longer need to deal with saving/restoring registers, but simply pend the context switching interrupt, which will be tail chained when all other nested higher priority interrupts are completed. Right now the list in chapter 15 starts with User/Supervisor/Machine software Interrupt, but I could not find an explicit mention of which interrupt to use for context switching. Perhaps this detail should be added to the specs too. |
The csip interrupt was meant for the background thread, and is allocated such as to have the lowest fixed priority (so an interrupt level does not need to be expended on making it the background thread). The CLINT M/S/U interrupt signals can be added (in parallel) as CLIC inputs in CLIC mode, and then prioritized using CLIC facilities. |
will move recommendation of csip to 16 for now to avoid conflicts with AIA. CSIP stands for context switch interrupt pending. will add this clarification to spec. will try to connect csip to context switching text to chapter 15. |
for issue #219 moved csip to id 16 to not conflict with AIA ordering. added mention that it might be used for context switching. Signed-off-by: Dan Smathers <[email protected]>
csip interrupt ordering clarification for issue #219
closed by pull #260 |
It seems to me that this issue is closed too early. Original question was a request to clarify contradiction between line: Because last lines recommend to move interrupt IDs to new places (not matched with table). Or have I misinterpreted? |
I updated the formatting of the interrupt recommendation tables to make it more obvious that there are 4 different recommendations depending on the profile that might be targeted. different recommendations were developed based on issue #89 "Being that software will need to handle interrupts differently in CLIC mode vs basic mode, why do we need to have the lower 16 CLIC IDs match the basic interrupt controller?" Does this make more sense? if not, go ahead and reopen this issue. Thanks. |
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for issue #219 Add text that specifies that these different interrupt ID recommendations are enumerated for reference in risc-v profile (ISA features) specifications. Change PLIC to PLIC/APLIC since recent risc-v platforms (specifications for a hardware system) refer to APLIC. Signed-off-by: Dan Smathers <[email protected]>
Can you look at the pull? I tried to point out that these are four different incompatible orderings enumerated here to guide common orderings for software compatibility. some implementations will not need csip so it is not included in 15.2, 15,3, 15.4. more information about profiles can be found here: https://github.com/riscv/riscv-profiles/blob/main/profiles.adoc#profiles-versus-platforms |
Thanks for pull. It seems good for me. |
Pull #265 merged. additional text clarification added during TG meeting. closing this for now. |
09/13/2022 issues #219/#222 - CLIC interrupt ordering text clarifications. Signed-off-by: Dan Smathers <[email protected]>
discussion about if this section should even be in the spec or moved to the appendix. should the recommendations be allowed to conflict with priv spec? also reference #89. |
As it is a recommendation, it belongs in the appendix and is non-normative. |
Clarify, please, interrupt ID ordering recommendations.
It seems to me that lines after table in chapter 15 (CLIC Interrupt ID ordering recommendations) contradict with line:
"Original recommendation: The original basic mode interrupts retain their interrupt ID in CLIC mode."
Thanks
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