Move clicintaddr register to wavedrom

Move clicintaddr register to wavedrom diagram
riscv · Sep 30, 2024 · f183af0 · f183af0
1 parent 3e4e499
commit f183af0
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diff --git a/docs-resources b/docs-resources
diff --git a/src/clic.adoc b/src/clic.adoc
@@ -555,6 +555,8 @@ only certain mode/trigger/shv types.
   0       reserved for smclicshv extension (WARL 0)
 ----
 
+include::images/wavedrom/clicintattr.edn[]
+
 The 2-bit `trig` WARL field specifies the trigger type and polarity for each
 interrupt input. Bit 1, `trig[0]`, is defined as "edge-triggered"
 (0: level-triggered, 1: edge-triggered); while bit 2, `trig[1]`, is defined

diff --git a/src/images/wavedrom/clicintattr.edn b/src/images/wavedrom/clicintattr.edn
@@ -0,0 +1,9 @@
+[wavedrom, ,svg]
+....
+{reg: [
+  {bits: 1, name: 'WARL(0)' },
+  {bits: 2, name: 'trig' },
+  {bits: 3, name: 'WPRI(0)' },
+  {bits: 2, name: 'mode' },
+  ]}
+....