pointer masking: Always apply sstatus.MXR regardless of effective V

ISA spec says "Setting MXR at HS-level overrides both VS-stage and G-stage execute-only permissions."
riscv-software-src · Aug 29, 2024 · d7b18c0 · d7b18c0
1 parent 272c149
commit d7b18c0
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/riscv/mmu.cc b/riscv/mmu.cc
@@ -614,7 +614,7 @@ void mmu_t::register_memtracer(memtracer_t* t)
 }
 
 reg_t mmu_t::get_pmlen(bool effective_virt, reg_t effective_priv, xlate_flags_t flags) const {
-  if (!proc || proc->get_xlen() != 64 || (proc->state.sstatus->readvirt(effective_virt) & MSTATUS_MXR) || flags.hlvx)
+  if (!proc || proc->get_xlen() != 64 || ((proc->state.sstatus->readvirt(false) | proc->state.sstatus->readvirt(virt)) & MSTATUS_MXR) || flags.hlvx)
     return 0;
 
   reg_t pmm = 0;