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CIC Decimation core re-written in VHDL #48

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CIC Decimation core re-written in VHDL #48

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Commits on Sep 23, 2024

  1. [WIP] Rewrite cic_decim.v in VHDL 

    This is part of the ongoing effort of making all cores compatible
with open source HDL simulators like GHDL and NVC.
    @augustofg
    augustofg committed Sep 23, 2024
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