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llvm: Update baseline to 7fa0d05a04056aac4365c69c4b515f613a43e454
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github-actions[bot] committed Oct 8, 2024
1 parent ee3875d commit f35dbec
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion llvm/llvm-project
Submodule llvm-project updated 63 files
+3 −0 clang/docs/ReleaseNotes.rst
+27 −39 clang/include/clang/AST/DeclTemplate.h
+4 −7 clang/include/clang/Basic/PlistSupport.h
+6 −19 clang/include/clang/Sema/Sema.h
+30 −19 clang/lib/AST/Decl.cpp
+14 −6 clang/lib/AST/DeclCXX.cpp
+14 −16 clang/lib/AST/DeclTemplate.cpp
+2 −4 clang/lib/Driver/MultilibBuilder.cpp
+12 −17 clang/lib/Sema/SemaConcept.cpp
+14 −17 clang/lib/Sema/SemaDecl.cpp
+2 −2 clang/lib/Sema/SemaDeclCXX.cpp
+85 −94 clang/lib/Sema/SemaTemplate.cpp
+3 −30 clang/lib/Sema/SemaTemplateDeduction.cpp
+16 −29 clang/lib/Sema/SemaTemplateDeductionGuide.cpp
+370 −382 clang/lib/Sema/SemaTemplateInstantiate.cpp
+37 −9 clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
+2 −1 clang/lib/Serialization/ASTReader.cpp
+9 −9 clang/lib/Serialization/ASTReaderDecl.cpp
+7 −10 clang/lib/Serialization/ASTWriterDecl.cpp
+3 −6 clang/lib/Tooling/Inclusions/HeaderIncludes.cpp
+175 −0 clang/test/CXX/temp/temp.constr/temp.constr.decl/p4.cpp
+178 −0 clang/test/CXX/temp/temp.spec/temp.expl.spec/p7.cpp
+1 −3 clang/test/Modules/cxx-templates.cpp
+1 −1 clang/test/SemaCXX/pragma-pack-packed-2.cpp
+1 −0 lldb/test/API/tools/lldb-dap/runInTerminal/TestDAP_runInTerminal.py
+1 −1 llvm/cmake/modules/HandleLLVMOptions.cmake
+14 −0 llvm/docs/RISCVUsage.rst
+2 −6 llvm/lib/AsmParser/LLParser.cpp
+2 −2 llvm/lib/Target/AArch64/AArch64RegisterInfo.td
+11 −11 llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
+5 −12 llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+30 −6 llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+41 −12 llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+56 −12 llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+2 −0 llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
+15 −0 llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
+16 −0 llvm/lib/Target/RISCV/RISCVInstrFormats.td
+12 −0 llvm/lib/Target/RISCV/RISCVInstrInfo.td
+1 −1 llvm/lib/Transforms/Coroutines/ABI.h
+9 −7 llvm/lib/Transforms/Coroutines/CoroFrame.cpp
+1 −5 llvm/lib/Transforms/Coroutines/CoroShape.h
+5 −4 llvm/lib/Transforms/Coroutines/CoroSplit.cpp
+2 −3 llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
+3 −3 llvm/test/CodeGen/AArch64/sme-avoid-coalescing-locally-streaming.ll
+15 −5 llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-mul.ll
+2,465 −630 llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
+106 −0 llvm/test/CodeGen/AMDGPU/GlobalISel/fmamix-constant-bus-violation.ll
+42 −0 llvm/test/CodeGen/AMDGPU/GlobalISel/fmamix-constant-bus-violation.mir
+62 −20 llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
+308 −170 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fdiv.mir
+106 −0 llvm/test/CodeGen/AMDGPU/GlobalISel/madmix-constant-bus-violation.ll
+42 −0 llvm/test/CodeGen/AMDGPU/GlobalISel/madmix-constant-bus-violation.mir
+44 −10 llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
+58 −13 llvm/test/CodeGen/AMDGPU/fold-int-pow2-with-fmul-or-fdiv.ll
+499 −171 llvm/test/CodeGen/AMDGPU/frem.ll
+26 −4 llvm/test/MC/RISCV/insn-invalid.s
+20 −0 llvm/test/MC/RISCV/insn.s
+1 −1 llvm/test/MC/RISCV/insn_c-invalid.s
+179 −55 llvm/test/Transforms/GVN/edge.ll
+0 −1 llvm/test/tools/llvm-profdata/sample-split-layout.test
+11 −1 llvm/utils/gn/secondary/lldb/test/BUILD.gn
+1 −0 llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
+1 −2 mlir/lib/Transforms/Utils/RegionUtils.cpp

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