Switch to lld and compiler-rt

FreeRTOS/Demo/RISC-V-Qemu-sifive_e-FreedomStudio/BuildEnvironment.mk

@@ -3,37 +3,35 @@
 # Copyright (c) 2019, Dornerworks Ltd.
 #
 
-CROSS_COMPILE_PREFIX := riscv$(ARCH_XLEN)-unknown-elf
 #-----------------------------------------------------------
 GCC     = $(ISP_PREFIX)/bin/clang
-ifeq ($(ARCH), rv64)
-GCC     = $(CROSS_COMPILE_PREFIX)-gcc
-endif
-OBJCOPY = $(CROSS_COMPILE_PREFIX)-objcopy
-OBJDUMP = $(CROSS_COMPILE_PREFIX)-objdump
-AR      = $(CROSS_COMPILE_PREFIX)-ar
-RANLIB  = $(CROSS_COMPILE_PREFIX)-ranlib
-GDB     = $(CROSS_COMPILE_PREFIX)-gdb
+
+OBJCOPY = llvm-objcopy
+OBJDUMP = llvm-objdump
+AR      = llvm-ar
+RANLIB  = llvm-ranlib
+GDB     = riscv64-unknown-elf-gdb
 
 INTERRUPT_HANDLER = handle_trap
 MSI_HANDLER = as_yet_unhandled
 
 # if using the multi-arch (riscv64-unknown-elf-gcc):
-ARCH_FLAGS = -march=rv32ima -mabi=ilp32 -mcmodel=medium
-ifeq ($(ARCH), rv64)
-ARCH_FLAGS = -march=rv64imafd -mabi=lp64d -mcmodel=medany
+ifneq ($(ARCH), rv64)
+ARCH_FLAGS = -march=rv32ima -mabi=ilp32 -mcmodel=medium --target=riscv32-unknown-elf
+else
+ARCH_FLAGS = -march=rv64imafd -mabi=lp64d -mcmodel=medany --target=riscv64-unknown-elf
 endif
 
 # Basic ISP_CFLAGS:
-ISP_CFLAGS  = -Wall -Wextra -O0 -g3 -std=gnu11
+ISP_CFLAGS  = -Wall -Wextra -O0 -g3 -std=gnu11 -mno-relax
 ISP_CFLAGS += -ffunction-sections -fdata-sections -fno-builtin-printf
 ISP_CFLAGS += -DDONT_USE_PLIC -DDONT_USE_M_TIME -Dmalloc\(x\)=pvPortMalloc\(x\) -Dfree\(x\)=vPortFree\(x\)
 ISP_CFLAGS += -include sys/cdefs.h
 ISP_CFLAGS += $(ARCH_FLAGS)
-ISP_CFLAGS += -I $(ISP_PREFIX)/$(CROSS_COMPILE_PREFIX)/include
+ISP_CFLAGS += -I $(ISP_PREFIX)/clang_sysroot/riscv$(ARCH_XLEN)-unknown-elf/include
 # These flags are for outputing *.d dependency files for make
 
-ISP_ASMFLAGS =  -O0 -g3
+ISP_ASMFLAGS =  -O0 -g3 -mno-relax
 ISP_ASMFLAGS += $(ARCH_FLAGS)
 ISP_ASMFLAGS += -DportasmHANDLE_INTERRUPT=$(INTERRUPT_HANDLER)
 ISP_ASMFLAGS += -DportasmMSI_HANDLER=$(MSI_HANDLER)
@@ -48,7 +46,7 @@ ISP_LDFLAGS := -Xlinker --defsym=__stack_size=1K
 ISP_LDFLAGS += -O0 -g3
 ISP_LDFLAGS += -ffunction-sections -fdata-sections --specs=nano.specs
 ISP_LDFLAGS += -nostartfiles
-ISP_LDFLAGS += -T $(LINKER_SCRIPT)
+ISP_LDFLAGS += -T $(LINKER_SCRIPT) -fuse-ld=lld
 
 ISP_LDFLAGS += $(foreach s,$(LIBWRAP_SYMS),-Wl,--wrap=$(s))
 ISP_LDFLAGS += $(foreach s,$(LIBWRAP_SYMS),-Wl,--wrap=_$(s))

FreeRTOS/Demo/RISC-V-Qemu-sifive_e-FreedomStudio/freedom-e-sdk/drivers/fe300prci/fe300prci_driver.c

@@ -1,11 +1,15 @@
 // See LICENSE file for license details
 
 #include "platform.h"
+#include "encoding.h"
 
 #ifdef PRCI_CTRL_ADDR
 #include "fe300prci/fe300prci_driver.h"
 #include <unistd.h>
 
+#if __riscv_xlen == 64
+#define rdmcycle(x) {*(x) = read_csr(mcycle); }
+#elif __riscv_xlen == 32
 #define rdmcycle(x)  {				       \
     uint32_t lo, hi, hi2;			       \
     __asm__ __volatile__ ("1:\n\t"		       \
@@ -16,6 +20,7 @@
 			  : "=r" (hi), "=r" (lo), "=r" (hi2)) ;	\
     *(x) = lo | ((uint64_t) hi << 32); 				\
   }
+#endif
 
 uint32_t PRCI_measure_mcycle_freq(uint32_t mtime_ticks, uint32_t mtime_freq)
 {
@@ -34,31 +39,31 @@ uint32_t PRCI_measure_mcycle_freq(uint32_t mtime_ticks, uint32_t mtime_freq)
   do {
     start_mtime = CLINT_REG(CLINT_MTIME);
   } while (start_mtime == tmp);
-  
+
   uint64_t start_mcycle;
   rdmcycle(&start_mcycle);
-  
+
   while (CLINT_REG(CLINT_MTIME) < end_mtime) ;
-  
+
   uint64_t end_mcycle;
   rdmcycle(&end_mcycle);
   uint32_t difference = (uint32_t) (end_mcycle - start_mcycle);
 
   uint64_t freq = ((uint64_t) difference * mtime_freq) / mtime_ticks;
   return (uint32_t) freq & 0xFFFFFFFF;
-  
+
 }
- 
+
 
 void PRCI_use_hfrosc(int div, int trim)
 {
   // Make sure the HFROSC is running at its default setting
   // It is OK to change this even if we are running off of it.
-  
+
   PRCI_REG(PRCI_HFROSCCFG) = (ROSC_DIV(div) | ROSC_TRIM(trim) | ROSC_EN(1));
 
   while ((PRCI_REG(PRCI_HFROSCCFG) & ROSC_RDY(1)) == 0);
-  
+
   PRCI_REG(PRCI_PLLCFG) &= ~PLL_SEL(1);
 }
 
@@ -71,12 +76,12 @@ void PRCI_use_pll(int refsel, int bypass,
     // Make sure the HFROSC is running at its default setting
     PRCI_use_hfrosc(4, 16);
   }
-  
+
   // Set PLL Source to be HFXOSC if desired.
   uint32_t config_value = 0;
 
   config_value |= PLL_REFSEL(refsel);
-  
+
   if (bypass) {
     // Bypass
     config_value |= PLL_BYPASS(1);
@@ -87,14 +92,14 @@ void PRCI_use_pll(int refsel, int bypass,
     // Set our Final output divide to divide-by-1:
     PRCI_REG(PRCI_PLLDIV) = (PLL_FINAL_DIV_BY_1(1) | PLL_FINAL_DIV(0));
   } else {
-  
+
     // To overclock, use the hfrosc
     if (hfrosctrim >= 0 && hfroscdiv >= 0) {
       PRCI_use_hfrosc(hfroscdiv, hfrosctrim);
     }
-    
+
     // Set DIV Settings for PLL
-    
+
     // (Legal values of f_REF are 6-48MHz)
 
     // Set DIVR to divide-by-2 to get 8MHz frequency
@@ -132,7 +137,7 @@ void PRCI_use_pll(int refsel, int bypass,
     // So wait 4 ticks of RTC.
     uint32_t now = CLINT_REG(CLINT_MTIME);
     while (CLINT_REG(CLINT_MTIME) - now < 4) ;
-    
+
     // Now it is safe to check for PLL Lock
     while ((PRCI_REG(PRCI_PLLCFG) & PLL_LOCK(1)) == 0);
 
@@ -146,7 +151,7 @@ void PRCI_use_pll(int refsel, int bypass,
   if (refsel) {
     PRCI_REG(PRCI_HFROSCCFG) &= ~ROSC_EN(1);
   }
-  
+
 }
 
 void PRCI_use_default_clocks()
@@ -160,7 +165,7 @@ void PRCI_use_default_clocks()
 
 void PRCI_use_hfxosc(uint32_t finaldiv)
 {
-  
+
   PRCI_use_pll(1, // Use HFXTAL
 	       1, // Bypass = 1
 	       0, // PLL settings don't matter
@@ -199,28 +204,28 @@ uint32_t PRCI_set_hfrosctrim_for_f_cpu(uint32_t f_cpu, PRCI_freq_target target )
   uint32_t desired_hfrosc_freq = (f_cpu/ 16);
 
   PRCI_use_hfrosc(hfroscdiv, hfrosctrim);
-  
+
   // Ignore the first run (for icache reasons)
   uint32_t cpu_freq = PRCI_measure_mcycle_freq(3000, RTC_FREQ);
 
   cpu_freq = PRCI_measure_mcycle_freq(3000, RTC_FREQ);
   uint32_t prev_freq = cpu_freq;
-  
+
   while ((cpu_freq < desired_hfrosc_freq) && (hfrosctrim < 0x1F)){
     prev_trim = hfrosctrim;
     prev_freq = cpu_freq;
     hfrosctrim ++;
     PRCI_use_hfrosc(hfroscdiv, hfrosctrim);
     cpu_freq = PRCI_measure_mcycle_freq(3000, RTC_FREQ);
-  } 
+  }
 
   // We couldn't go low enough
   if (prev_freq > desired_hfrosc_freq){
     PRCI_use_pll(0, 0, 1, 31, 1, 1, hfroscdiv, prev_trim);
     cpu_freq = PRCI_measure_mcycle_freq(1000, RTC_FREQ);
     return cpu_freq;
   }
-  
+
   // We couldn't go high enough
   if (cpu_freq < desired_hfrosc_freq){
     PRCI_use_pll(0, 0, 1, 31, 1, 1, hfroscdiv, prev_trim);

FreeRTOS/Demo/RISC-V-Qemu-sifive_e-FreedomStudio/freedom-e-sdk/env/encoding.h

@@ -170,10 +170,17 @@
   asm volatile ("csrr %0, " #reg : "=r"(__tmp)); \
   __tmp; })
 
+/* TODO: */
+/*
+  The conditional here does not work. It seems to see the value as less than 32
+ */
+/* #define write_csr(reg, val) ({ \ */
+/*   if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \ */
+/*     asm volatile ("csrwi " #reg ", %0" :: "i"(val)); \ */
+/*   else \ */
+/*     asm volatile ("csrw " #reg ", %0" :: "r"(val)); }) */
+
 #define write_csr(reg, val) ({ \
-  if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \
-    asm volatile ("csrw " #reg ", %0" :: "i"(val)); \
-  else \
     asm volatile ("csrw " #reg ", %0" :: "r"(val)); })
 
 #define swap_csr(reg, val) ({ unsigned long __tmp; \

FreeRTOS/Demo/RISC-V-Qemu-sifive_e-FreedomStudio/freedom-e-sdk/env/freedom-e300-hifive1/flash.lds

@@ -4,8 +4,8 @@ ENTRY( _start )
 
 MEMORY
 {
-  flash (rxai!w) : ORIGIN = 0x20400000, LENGTH = 512M
-  ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 8M
+  flash (rxa!w) : ORIGIN = 0x20400000, LENGTH = 512M
+  ram (wxa!r) : ORIGIN = 0x80000000, LENGTH = 8M
 }
 
 PHDRS
@@ -19,20 +19,22 @@ SECTIONS
 {
   __stack_size = DEFINED(__stack_size) ? __stack_size : 4K;
 
-  .init           :
+  .init       ALIGN(4):
   {
     KEEP (*(SORT_NONE(.init)))
   } >flash AT>flash :flash
 
-  .text           :
+  .text       ALIGN(4):
   {
     *(.text.unlikely .text.unlikely.*)
     *(.text.startup .text.startup.*)
     *(.text .text.*)
     *(.gnu.linkonce.t.*)
+    *(.eh_frame_hdr)
+    *(.eh_frame)
   } >flash AT>flash :flash
 
-  .fini           :
+  .fini       ALIGN(4):
   {
     KEEP (*(SORT_NONE(.fini)))
   } >flash AT>flash :flash
@@ -41,39 +43,40 @@ SECTIONS
   PROVIDE (_etext = .);
   PROVIDE (etext = .);
 
-  .rodata         :
+  .rodata     ALIGN(4):
   {
+    . = ALIGN(4);
     *(.rdata)
     *(.rodata .rodata.*)
     *(.gnu.linkonce.r.*)
   } >flash AT>flash :flash
 
   . = ALIGN(4);
 
-  .preinit_array  :
+  .preinit_array  ALIGN(4):
   {
     PROVIDE_HIDDEN (__preinit_array_start = .);
     KEEP (*(.preinit_array))
     PROVIDE_HIDDEN (__preinit_array_end = .);
   } >flash AT>flash :flash
 
-  .init_array     :
+  .init_array ALIGN(4):
   {
     PROVIDE_HIDDEN (__init_array_start = .);
     KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
     KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
     PROVIDE_HIDDEN (__init_array_end = .);
   } >flash AT>flash :flash
 
-  .fini_array     :
+  .fini_array ALIGN(4):
   {
     PROVIDE_HIDDEN (__fini_array_start = .);
     KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
     KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
     PROVIDE_HIDDEN (__fini_array_end = .);
   } >flash AT>flash :flash
 
-  .ctors          :
+  .ctors      ALIGN(4):
   {
     /* gcc uses crtbegin.o to find the start of
        the constructors, so we make sure it is
@@ -95,7 +98,7 @@ SECTIONS
     KEEP (*(.ctors))
   } >flash AT>flash :flash
 
-  .dtors          :
+  .dtors      ALIGN(4):
   {
     KEEP (*crtbegin.o(.dtors))
     KEEP (*crtbegin?.o(.dtors))
@@ -104,19 +107,19 @@ SECTIONS
     KEEP (*(.dtors))
   } >flash AT>flash :flash
 
-  .lalign         :
+  .lalign     ALIGN(4):
   {
     . = ALIGN(4);
     PROVIDE( _data_lma = . );
   } >flash AT>flash :flash
 
-  .dalign         :
+  .dalign     ALIGN(4):
   {
     . = ALIGN(4);
     PROVIDE( _data = . );
   } >ram AT>flash :ram_init
 
-  .data          :
+  .data      ALIGN(4):
   {
     *(.data .data.*)
     *(.gnu.linkonce.d.*)
@@ -138,7 +141,7 @@ SECTIONS
 
   PROVIDE( _fbss = . );
   PROVIDE( __bss_start = . );
-  .bss            :
+  .bss        ALIGN(4):
   {
     *(.sbss*)
     *(.gnu.linkonce.sb.*)
@@ -155,7 +158,7 @@ SECTIONS
   .stack ORIGIN(ram) + LENGTH(ram) - __stack_size :
   {
     PROVIDE( _heap_end = . );
-    . = __stack_size;
+    . += __stack_size;
     PROVIDE( _sp = . );
     __freertos_irq_stack_top = .;
   } >ram AT>ram :ram

FreeRTOS/Demo/RISC-V-Qemu-sifive_e-FreedomStudio/freedom-e-sdk/env/start.S

@@ -47,9 +47,11 @@ _start:
 2:
 
 	/* Call global constructors */
+/*
 	la a0, __libc_fini_array
 	call atexit
 	call __libc_init_array
+*/
 
 #ifndef __riscv_float_abi_soft
 	/* Enable FPU */