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ChangeLog 4.0 alpha1
Nguyen Anh Quynh edited this page May 25, 2015
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(Look here for the detailed changelog of v3.0.3)
This page details all the changes in the version 4.0-alpha1. While far from the final version 4.0, this is stable enough for some architectures such as X86 and ARM.
NOTE: changes are listed in time order: newer changes are at the top, older changes are at the bottom.
Library:
- New option CS_OPT_MNEMONIC to customize instruction mnemonics (see docs).
- New API cs_regs_access() & access info for instruction operands (see documentation).
- make.sh has been rewritten to be faster & more portable.
- pkg-config is consistent with installation.
X86:
- Properly decode some instructions beginning with f3 or 660f, where f3 & 66 are not prefix.
- Correct the size of immediate operand for instruction CMP8i8.
- Update core with 46 instructions added (including latest extensions from Broadwell CPU).
- Fix operand size of instructions with operand
PTR []
- Add prefix constant REPE (= REP).
- Handle the opcode
0x82
(non-64bit instructions). - Properly handle instructions using CR9~CR15 registers.
- Remove dead SSE_CC constants.
- Add new registers DR8-DR15.
- New undocumented instructions FDISI8087_NOP, FENI8087_NOP & FFREEP.
PowerPC:
- Update core with 164 instructions added (with new QPX extension).
Mips:
- Update core with 40 instructions added.
- Sanity check for the input size for MIPS64 mode.
Arm:
- BLX instruction modifies PC & LR registers.
- Remove bogus instructions ASRS, LSRS, SUBS and MOVS.
- Update core with 2 instructions added.
- Add lshift field to arm_op_mem.
Python:
- X86Op.avx_zero_mask now has c_bool type, not c_uint8 type.
Make sure to compile and install new code:
$ ./make.sh
$ sudo ./make.sh install
Just in case, always remember to reinstall bindings whenever you update the core to maintain the compatibility between the core & the bindings. For example, with Python binding, do:
$ cd bindings/python
$ sudo make install