ipc: icbmsg: Add support for POSIX arch targets

boards/native/nrf_bsim/ipc_backend.c

@@ -18,10 +18,31 @@
 #include "nsi_cpu_if.h"
 #include <zephyr/device.h>
 
+#if defined(CONFIG_IPC_SERVICE_STATIC_VRINGS)
+
 #define DT_DRV_COMPAT zephyr_ipc_openamp_static_vrings
 
 #define DEFINE_BACKEND_BUFFER(i) \
 	NATIVE_SIMULATOR_IF \
 	char IPC##i##_shm_buffer[DT_REG_SIZE(DT_INST_PHANDLE(i, memory_region))];
 
 DT_INST_FOREACH_STATUS_OKAY(DEFINE_BACKEND_BUFFER)
+
+#endif
+
+#if defined(CONFIG_IPC_SERVICE_BACKEND_ICBMSG)
+
+#undef DT_DRV_COMPAT
+#define DT_DRV_COMPAT zephyr_ipc_icbmsg
+
+#define DEFINE_BACKEND_BUFFER_DIR(i, dir)	\
+	NATIVE_SIMULATOR_IF			\
+	char IPC##i##_##dir##_shm_buffer[DT_REG_SIZE(DT_INST_PHANDLE(i, dir##_region))] = {0};
+
+#define DEFINE_BACKEND_BUFFER(i)		\
+	DEFINE_BACKEND_BUFFER_DIR(i, tx)	\
+	DEFINE_BACKEND_BUFFER_DIR(i, rx)
+
+DT_INST_FOREACH_STATUS_OKAY(DEFINE_BACKEND_BUFFER)
+
+#endif

include/zephyr/ipc/pbuf.h

@@ -127,6 +127,20 @@
 #define PBUF_HEADER_OVERHEAD(dcache_align) \
 	(MAX(dcache_align, _PBUF_IDX_SIZE) + _PBUF_IDX_SIZE)
 
+#if !defined(CONFIG_ARCH_POSIX)
+#define PBUF_CHECKS(name, mem_addr, size, dcache_align)				\
+BUILD_ASSERT(dcache_align >= 0,							\
+		"Cache line size must be non negative.");			\
+BUILD_ASSERT((size) > 0 && IS_PTR_ALIGNED_BYTES(size, _PBUF_IDX_SIZE),		\
+		"Incorrect size.");						\
+BUILD_ASSERT(IS_PTR_ALIGNED_BYTES(mem_addr, MAX(dcache_align, _PBUF_IDX_SIZE)),	\
+		"Misaligned memory.");						\
+BUILD_ASSERT(size >= (MAX(dcache_align, _PBUF_IDX_SIZE) + _PBUF_IDX_SIZE +	\
+		_PBUF_MIN_DATA_LEN), "Insufficient size.");
+#else
+#define PBUF_CHECKS(name, mem_addr, size, dcache_align)
+#endif
+
 /**
  * @brief Statically define and initialize pbuf.
  *
@@ -136,20 +150,12 @@
  * @param dcache_align	Data cache line size.
  */
 #define PBUF_DEFINE(name, mem_addr, size, dcache_align)					\
-	BUILD_ASSERT(dcache_align >= 0,							\
-			"Cache line size must be non negative.");			\
-	BUILD_ASSERT((size) > 0 && IS_PTR_ALIGNED_BYTES(size, _PBUF_IDX_SIZE),		\
-			"Incorrect size.");						\
-	BUILD_ASSERT(IS_PTR_ALIGNED_BYTES(mem_addr, MAX(dcache_align, _PBUF_IDX_SIZE)),	\
-			"Misaligned memory.");						\
-	BUILD_ASSERT(size >= (MAX(dcache_align, _PBUF_IDX_SIZE) + _PBUF_IDX_SIZE +	\
-			_PBUF_MIN_DATA_LEN), "Insufficient size.");			\
-											\
+	PBUF_CHECKS(name, mem_addr, size, dcache_align)					\
 	static const struct pbuf_cfg cfg_##name =					\
 			PBUF_CFG_INIT(mem_addr, size, dcache_align);			\
 	static struct pbuf name = {							\
 		.cfg = &cfg_##name,							\
 	}
 
 /**
  * @brief Initialize the packet buffer.

subsys/ipc/ipc_service/backends/ipc_icbmsg.c

@@ -1213,13 +1213,32 @@
 	((total_size) - GET_BLOCK_SIZE(i, (total_size), (local_blocks),			\
 				       (remote_blocks)) * (local_blocks))
 
+
+
 /**
  * Return shared memory start address aligned to block alignment and cache line.
  */
+#if !defined(CONFIG_ARCH_POSIX)
+#define ICBMSG_BACKEND_PRE(...)
 #define GET_MEM_ADDR_INST(i, direction) \
 	ROUND_UP(DT_REG_ADDR(DT_INST_PHANDLE(i, direction##_region)),			\
 		 GET_CACHE_ALIGNMENT(i))
 
+#else
+#if (CONFIG_NATIVE_SIMULATOR_MCU_N == 1)
+#define _IPC0_tx_shm_buffer IPC0_rx_shm_buffer
+#define _IPC0_rx_shm_buffer IPC0_tx_shm_buffer
+#else
+#define _IPC0_tx_shm_buffer IPC0_tx_shm_buffer
+#define _IPC0_rx_shm_buffer IPC0_rx_shm_buffer
+#endif
+
+#define ICBMSG_BACKEND_PRE(i, direction) \
+	extern char _IPC##i##_##direction##_shm_buffer[];
+#define GET_MEM_ADDR_INST(i, direction) \
+	(const uintptr_t)_IPC##i##_##direction##_shm_buffer
+#endif
+
 /**
  * Return shared memory end address aligned to block alignment and cache line.
  */
@@ -1231,8 +1250,13 @@
 /**
  * Return shared memory size aligned to block alignment and cache line.
  */
-#define GET_MEM_SIZE_INST(i, direction) \
+#if !defined(CONFIG_ARCH_POSIX)
+#define GET_MEM_SIZE_INST(i, direction)						\
 	(GET_MEM_END_INST(i, direction) - GET_MEM_ADDR_INST(i, direction))
+#else
+#define GET_MEM_SIZE_INST(i, direction)						\
+	DT_REG_SIZE(DT_INST_PHANDLE(i, direction##_region))
+#endif
 
 /**
  * Returns GET_ICMSG_SIZE, but for specific instance and direction.
@@ -1272,6 +1296,8 @@
 		DT_INST_PROP(i, rem##_blocks))
 
 #define DEFINE_BACKEND_DEVICE(i)							\
+	ICBMSG_BACKEND_PRE(i, tx);							\
+	ICBMSG_BACKEND_PRE(i, rx);							\
 	SYS_BITARRAY_DEFINE_STATIC(tx_usage_bitmap_##i, DT_INST_PROP(i, tx_blocks));	\
 	SYS_BITARRAY_DEFINE_STATIC(rx_hold_bitmap_##i, DT_INST_PROP(i, rx_blocks));	\
 	PBUF_DEFINE(tx_icbmsg_pb_##i,							\
@@ -1327,5 +1353,5 @@
 			      POST_KERNEL,						\
 			      CONFIG_IPC_SERVICE_REG_BACKEND_PRIORITY,			\
 			      &backend_ops);
 
 DT_INST_FOREACH_STATUS_OKAY(DEFINE_BACKEND_DEVICE)