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Preserve SECONDS fields when clearing Clock Halt bit at initialisation (#77354) #77727

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@clodnut clodnut commented Aug 29, 2024

drivers: rtc: rtc_1307.c

Read/modify/write the CH/SECONDS register at initialisation to clear only the Clock Halt bit and only if it is set.

This prevents the SECONDS field(s) from being wiped out unconditionally at initialisation.

Fixes #77354.

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Hello @clodnut, and thank you very much for your first pull request to the Zephyr project!
Our Continuous Integration pipeline will execute a series of checks on your Pull Request commit messages and code, and you are expected to address any failures by updating the PR. Please take a look at our commit message guidelines to find out how to format your commit messages, and at our contribution workflow to understand how to update your Pull Request. If you haven't already, please make sure to review the project's Contributor Expectations and update (by amending and force-pushing the commits) your pull request if necessary.
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@bjarki-andreasen
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Hi, you need to squash your commits and force push the single commit, and make the header of said commit a bit more descriptive :)

@clodnut clodnut force-pushed the rtc-ds1307-fix-issue-77354 branch 3 times, most recently from 7f0a07b to 8abfa71 Compare September 12, 2024 16:14
@clodnut clodnut force-pushed the rtc-ds1307-fix-issue-77354 branch 2 times, most recently from 67e59f9 to 890eb21 Compare September 17, 2024 12:52
We read/modify/write the CH/SECONDS register at initialisation to clear
only the Clock Halt bit and only if it is set.

The previous implementation zeroes the entire register unconditionally at
initialisation, which wipes the SECONDS fields.

Fixes zephyrproject-rtos#77354.

Signed-off-by: Andrew Feldhaus ([email protected])
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RTC_DS1307 driver zeroes-out seconds when initialising
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