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MCXN94X Adding LPTMR Counter Support #73236

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merged 5 commits into from
Jun 11, 2024
Merged

MCXN94X Adding LPTMR Counter Support #73236

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23dd1a2
dts: arm: nxp_mcxn947: Added lptmr Node in dts
EmilioCBen May 22, 2024
cec4aa4
drivers: counter: counter_mcux_lptmr: Update to start with top value
EmilioCBen May 29, 2024
c12735b
drivers: timer: updated lptmr_timer binding
EmilioCBen Jun 5, 2024
eac6a88
boards: nxp: frdm_mcxn947: Enable lpmtr for frdm_mcxn947
EmilioCBen May 22, 2024
3bee8eb
tests: drivers: counter: counter_basic_api: enabled lptmr testing
EmilioCBen May 22, 2024
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4 changes: 4 additions & 0 deletions boards/nxp/frdm_mcxn947/board.c
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Original file line number Diff line number Diff line change
Expand Up @@ -298,6 +298,10 @@ static int frdm_mcxn947_init(void)
SPC_EnableActiveModeAnalogModules(SPC0, (kSPC_controlCmp0 | kSPC_controlCmp0Dac));
#endif

#if DT_NODE_HAS_STATUS(DT_NODELABEL(lptmr0), okay)
CLOCK_SetupClk16KClocking(kCLOCK_Clk16KToVsys);
#endif

/* Set SystemCoreClock variable. */
SystemCoreClock = CLOCK_INIT_CORE_CLOCK;

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2 changes: 2 additions & 0 deletions boards/nxp/frdm_mcxn947/doc/index.rst
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Expand Up @@ -94,6 +94,8 @@ The FRDM-MCXN947 board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| FLEXCAN | on-chip | CAN |
+-----------+------------+-------------------------------------+
| LPTMR | on-chip | counter |
+-----------+------------+-------------------------------------+

Targets available
==================
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4 changes: 4 additions & 0 deletions boards/nxp/frdm_mcxn947/frdm_mcxn947.dtsi
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Expand Up @@ -83,6 +83,10 @@
* replace &os_timer with &systick
*/
&os_timer {
status = "disabled";
};

&systick {
status = "okay";
};

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4 changes: 4 additions & 0 deletions boards/nxp/frdm_mcxn947/frdm_mcxn947_mcxn947_cpu0.dts
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Expand Up @@ -174,3 +174,7 @@ zephyr_udc0: &usb1 {
&lpcmp0 {
status = "okay";
};

&lptmr0 {
status = "okay";
};
5 changes: 4 additions & 1 deletion drivers/counter/counter_mcux_lptmr.c
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Expand Up @@ -142,6 +142,8 @@ static int mcux_lptmr_init(const struct device *dev)

LPTMR_Init(config->base, &lptmr_config);

LPTMR_SetTimerPeriod(config->base, config->info.max_top_value);

config->irq_config_func(dev);

return 0;
Expand Down Expand Up @@ -210,7 +212,8 @@ static void mcux_lptmr_irq_config_0(const struct device *dev);

static struct mcux_lptmr_config mcux_lptmr_config_0 = {
.info = {
.max_top_value = UINT16_MAX,
.max_top_value = ((DT_INST_PROP(0, resolution) == 32)
? UINT32_MAX : UINT16_MAX),
.freq = DT_INST_PROP(0, clock_frequency) /
DT_INST_PROP(0, prescaler),
.flags = COUNTER_CONFIG_INFO_COUNT_UP,
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1 change: 0 additions & 1 deletion drivers/timer/Kconfig.mcux_lptmr
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Expand Up @@ -9,7 +9,6 @@ config MCUX_LPTMR_TIMER
depends on DT_HAS_NXP_KINETIS_LPTMR_ENABLED || \
MCUX_KINETIS_LPTMR
depends on !COUNTER_MCUX_LPTMR
depends on PM
select SYSTEM_TIMER_HAS_DISABLE_SUPPORT
help
This module implements a kernel device driver for the NXP MCUX Low
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1 change: 1 addition & 0 deletions dts/arm/nxp/nxp_ke1xf.dtsi
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Expand Up @@ -290,6 +290,7 @@
clock-frequency = <128000>;
prescaler = <1>;
clk-source = <1>;
resolution = <16>;
};

wdog: watchdog@40052000 {
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10 changes: 10 additions & 0 deletions dts/arm/nxp/nxp_mcxn94x_common.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -894,6 +894,16 @@
clk-source = <0>;
status = "disabled";
};

lptmr0: lptmr@4a000 {
compatible = "nxp,lptmr";
reg = <0x4a000 0x1000>;
interrupts = <143 0>;
clock-frequency = <16000>;
prescaler = <1>;
clk-source = <1>;
resolution = <32>;
};
};

&systick {
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5 changes: 5 additions & 0 deletions dts/bindings/counter/nxp,lptmr.yaml
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Expand Up @@ -29,3 +29,8 @@ properties:
active-low:
type: boolean
description: Pulse counter input pin is active-low

resolution:
type: int
required: true
description: Represents the width of the timer in bits.
16 changes: 5 additions & 11 deletions soc/nxp/mcx/mcxnx4x/Kconfig.defconfig
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Expand Up @@ -12,18 +12,12 @@ config ROM_START_OFFSET
config ZTEST_NO_YIELD
default y if (PM && ZTEST)

if MCUX_OS_TIMER
config MCUX_LPTMR_TIMER
default n if (DT_HAS_NXP_OS_TIMER_ENABLED || DT_HAS_ARM_ARMV8M_SYSTICK_ENABLED)

config SYS_CLOCK_HW_CYCLES_PER_SEC
default 1000000

endif # MCUX_OS_TIMER

if CORTEX_M_SYSTICK

config SYS_CLOCK_HW_CYCLES_PER_SEC
default 150000000

endif # CORTEX_M_SYSTICK
default 1000000 if MCUX_OS_TIMER
default 16000 if MCUX_LPTMR_TIMER
default 150000000 if CORTEX_M_SYSTICK

endif # SOC_SERIES_MCXNX4X
3 changes: 3 additions & 0 deletions tests/drivers/counter/counter_basic_api/src/test_counter.c
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Expand Up @@ -112,6 +112,9 @@ static const struct device *const devices[] = {
#ifdef CONFIG_COUNTER_AMBIQ
DEVS_FOR_DT_COMPAT(ambiq_counter)
#endif
#ifdef CONFIG_COUNTER_MCUX_LPTMR
DEVS_FOR_DT_COMPAT(nxp_lptmr)
#endif
};

static const struct device *const period_devs[] = {
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