[RFC] Introduce Clock Management Subsystem (Clock Driver Based)

CMakeLists.txt

@@ -1035,6 +1035,24 @@ if(CONFIG_USERSPACE)
   set(PROCESS_GPERF ${ZEPHYR_BASE}/scripts/build/process_gperf.py)
 endif()
 
+if(CONFIG_CLOCK_MGMT)
+  # clock_deps.c is generated from ${ZEPHYR_LINK_STAGE_EXECUTABLE} by
+  # gen_clock_deps.py
+  add_custom_command(
+    OUTPUT clock_deps.c
+    COMMAND
+    ${PYTHON_EXECUTABLE}
+    ${ZEPHYR_BASE}/scripts/build/gen_clock_deps.py
+    --output-source clock_deps.c
+    --kernel $<TARGET_FILE:${ZEPHYR_LINK_STAGE_EXECUTABLE}>
+    --zephyr-base ${ZEPHYR_BASE}
+    --start-symbol "$<TARGET_PROPERTY:linker,devices_start_symbol>"
+    VERBATIM
+    DEPENDS ${ZEPHYR_LINK_STAGE_EXECUTABLE}
+    )
+  set_property(GLOBAL APPEND PROPERTY GENERATED_APP_SOURCE_FILES clock_deps.c)
+endif()
+
 get_property(GLOBAL_CSTD GLOBAL PROPERTY CSTD)
 if(DEFINED GLOBAL_CSTD)
   message(DEPRECATION
@@ -1279,7 +1297,7 @@ if(CONFIG_USERSPACE)
   )
 endif()
 
-if(CONFIG_USERSPACE OR CONFIG_DEVICE_DEPS)
+if(CONFIG_USERSPACE OR CONFIG_DEVICE_DEPS OR CONFIG_CLOCK_MGMT)
   configure_linker_script(
     ${ZEPHYR_CURRENT_LINKER_CMD}
     "${LINKER_PASS_${ZEPHYR_CURRENT_LINKER_PASS}_DEFINE}"

boards/native/native_sim/native_sim.yaml

@@ -11,6 +11,7 @@ toolchain:
 supported:
   - can
   - counter
+  - clock_mgmt
   - dma
   - eeprom
   - netif:eth

boards/nxp/lpcxpresso55s69/lpcxpresso55s69_lpc55s69_cpu0.dts

@@ -10,6 +10,7 @@
 #include "lpcxpresso55s69.dtsi"
 #include <zephyr/dt-bindings/pwm/pwm.h>
 #include <zephyr/dt-bindings/input/input-event-codes.h>
+#include <freq.h>
 
 / {
 	model = "NXP LPCXpresso55S69 board";
@@ -108,6 +109,50 @@
 
 &flexcomm0 {
 	status = "okay";
+	clock-state-0 = <&fxcom0_96mhz>;
+	clock-state-names = "default";
+};
+
+&cpu0 {
+	clock-state-0 = <&sys_clk_144mhz>;
+	clock-state-names = "default";
+};
+
+&fxcom0_clock {
+	/* 96 MHz setpoint for Flexcomm0 clock using FROHF */
+	fxcom0_96mhz: fxcom0_96mhz {
+		compatible = "clock-state";
+		clocks = <&fcclksel0 3 &frohfdiv 1>;
+		clock-frequency = <DT_FREQ_M(96)>;
+	};
+};
+
+&system_clock {
+	/* 144 MHz setpoint for CPU core clock */
+	sys_clk_144mhz: sys_clk_144mhz {
+		compatible = "clock-state";
+		clocks = <&ahbclkdiv 1 &fro_12m 1 &mainclkselb 0 &mainclksela 0
+			&xtal32m 1 &clk_in_en 1 &pll1clksel 1
+			&pll1_pdec 2 &pll1 288000000 8 144 0 53 31
+			&pll1_directo 0 &pll1_bypass 0
+			&mainclkselb 2>;
+		clock-frequency = <DT_FREQ_M(144)>;
+		locking-state;
+	};
+};
+
+&fxcom2_clock {
+	/* 96 MHz setpoint for Flexcomm2 clock using FROHF */
+	fxcom2_96mhz: fxcom2_96mhz {
+		compatible = "clock-state";
+		clocks = <&fcclksel2 3 &frohfdiv 1>;
+		clock-frequency = <DT_FREQ_M(96)>;
+	};
+};
+
+&flexcomm2 {
+	clock-state-0 = <&fxcom2_96mhz>;
+	clock-state-names = "default";
 };
 
 &flexcomm4 {

boards/nxp/lpcxpresso55s69/lpcxpresso55s69_lpc55s69_cpu0.yaml

@@ -19,6 +19,7 @@ supported:
   - arduino_i2c
   - arduino_serial
   - arduino_spi
+  - clock_mgmt
   - counter
   - gpio
   - i2c

boards/nxp/lpcxpresso55s69/lpcxpresso55s69_lpc55s69_cpu0_defconfig

@@ -19,3 +19,6 @@ CONFIG_HW_STACK_PROTECTION=y
 # Enable TrustZone-M
 CONFIG_TRUSTED_EXECUTION_SECURE=y
 CONFIG_ARM_TRUSTZONE_M=y
+
+# Enable clock management
+CONFIG_CLOCK_MGMT=y

boards/nxp/lpcxpresso55s69/pre_dt_board.cmake

@@ -0,0 +1,6 @@
+# Copyright 2024 NXP
+# SPDX-License-Identifier: Apache-2.0
+
+# Suppress "unique_unit_address_if_enabled" to handle syscon
+# clock address overlaps
+list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")

cmake/modules/extensions.cmake

@@ -38,6 +38,8 @@ include(CheckCXXCompilerFlag)
 # 7.1 llext_* configuration functions
 # 7.2 add_llext_* build control functions
 # 7.3 llext helper functions
+# 8 Clock Management extensions
+# 8.1 Clock Management headers
 
 ########################################################
 # 1. Zephyr-aware extensions
@@ -5697,3 +5699,51 @@ function(llext_filter_zephyr_flags filter flags outvar)
 
   set(${outvar} ${zephyr_filtered_flags} PARENT_SCOPE)
 endfunction()
+
+
+########################################################
+# 8. Clock Management extensions
+########################################################
+#
+# These functions enable clock drivers to register their headers for inclusion
+# into the clock management framework. This is required to properly support
+# out of tree clock drivers, as the clock driver header needs to be included
+# within the in-tree clock management code.
+
+# 8.1 Clock Management headers
+#
+# This function permits drivers to register headers for use with the clock
+# management framework, which provide macros to extract configuration data
+# from their clock nodes in devicetree
+
+# Usage:
+#   add_clock_mgmt_header(<filename>)
+#
+# Adds the header file given by <filename> to the list of files included
+# within the clock management framework for clock drivers
+#
+function(add_clock_mgmt_header filename)
+  # Get the real path of the file
+  file(REAL_PATH "${filename}" abs_path)
+  get_property(clock_mgmt_includes TARGET clock_mgmt_header_target PROPERTY
+    COMPILE_DEFINITIONS)
+  list(APPEND clock_mgmt_includes "${abs_path}")
+  set_property(TARGET clock_mgmt_header_target PROPERTY COMPILE_DEFINITIONS
+    "${clock_mgmt_includes}")
+endfunction()
+
+# Usage:
+#   add_clock_mgmt_header_ifdef(<setting> <filename>)
+#
+# Will add header to clock management framework if <setting> is enabled.
+#
+# <setting>: Setting to check for True value before invoking
+#            add_clock_mgmt_header()
+#
+# See add_clock_mgmt_header() description for other supported arguments.
+#
+macro(add_clock_mgmt_header_ifdef feature_toggle)
+  if(${${feature_toggle}})
+    add_clock_mgmt_header(${ARGN})
+  endif()
+endmacro()

cmake/modules/kernel.cmake

@@ -65,6 +65,7 @@ May include isr_tables.c etc."
 set_property(GLOBAL PROPERTY GENERATED_KERNEL_SOURCE_FILES "")
 
 add_custom_target(code_data_relocation_target)
+add_custom_target(clock_mgmt_header_target)
 
 # The zephyr/runners.yaml file in the build directory is used to
 # configure the scripts/west_commands/runners Python package used