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fix bugs in mcux i2s and dma #59832

Merged
merged 3 commits into from
Jul 19, 2023
Merged

fix bugs in mcux i2s and dma #59832

merged 3 commits into from
Jul 19, 2023

Commits on Jul 17, 2023

  1. drivers: i2s: mcux_flexcomm: fix multiple bugs 

    Fix for bugs described in:
zephyrproject-rtos#59803

1. the size argument passed to i2s_write() was being ignored.
   change the code so that the size is queued with the
   tx mem_block and the dma transfer is configured with this
   size.

2. change how CONFIG_I2S_MCUX_FLEXCOMM_RX_BLOCK_COUNT and
   CONFIG_I2S_MCUX_FLEXCOMM_TX_BLOCK_COUNT are used so that
   the queue buffers are allocated correctly when the two
   config values are not the same

3. set source_data_size and dest_data_size to be the same
   since the DMA controller can only set one size per
   DMA transfer. the driver was already computing a dest_data_size
   but always passing 1 for the source_data_size.
   For I2S RX case, I think source_data_size should be
   set to the expected FIFO read size instead of dest_data_size.

Also some smaller improvements like:
* don't allocate two dma_blocks for tx in the static dev_mem
  when it only needs one
* memset both rx_dma_blocks together instead of separtely
* set dma_cfg block_count for tx and rx statically instead
  of at runtime

Signed-off-by: Mike J. Chen <[email protected]>
    @mjchen0
    mjchen0 committed Jul 17, 2023
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  2. drivers: spi: mcux_flexcomm: fix DMA bug for 2-byte transfers 

    The MCUX DMA controller only supports a single data_size
for a DMA transfer, not separate ones for source and
dest. An older version of the DMA driver used
dest_data_size as the DMA transfer size, but the
current one uses MIN(dest/source) as the trasnfer
size, which breaks case when SPI wants to do 2-byte
transfers.

Signed-off-by: Mike J. Chen <[email protected]>
    @mjchen0
    mjchen0 committed Jul 17, 2023
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  3. drivers: dma: dma_lpc: fix bug with transfer size/width 

    Fix for bug:
zephyrproject-rtos#59802

The DMA controller only supports one transfer size, but
the Zephyr DMA driver api allows specifying a source_data_size
and dest_data_size which might be different. An old
version was always using dest_data_size for the transfer
size (variable is called "width"), but a recent change
made the driver use the MIN for the source and dest data
sizes. The MIN choice breaks the I2S driver because it
always set source_data_size to 1, but dest_data_size was
typically 4 for like two-channel 16-bit PCM data. So the
old driver worked using dest_data_size, but the new driver
broke I2S using MIN since source_data_size was 1.

To prevent confusion, change the DMA driver to assert that
source_data_size and dest_data_size are the same.

Also assert that the source_address and dest_address for
each block_config are properly aligned for the transfer size,
since that is a documentated requirement for the DMA controller.

Also rename max_xfer to max_xfer-bytes to be more clear what
the units are, and use this value in many places that
are comparing block_size in bytes rather than converting
block_size to words by dividing by width and
then comparing to NXP_LPC_DMA_MAX_XFER.

Signed-off-by: Mike J. Chen <[email protected]>
    @mjchen0
    mjchen0 committed Jul 17, 2023
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