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intel_adsp: ace: Restore IDC interrupt on D3 exit #59790

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merged 1 commit into from
Jun 28, 2023
Merged

intel_adsp: ace: Restore IDC interrupt on D3 exit #59790

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11 changes: 11 additions & 0 deletions soc/xtensa/intel_adsp/ace/multiprocessing.c
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Original file line number Diff line number Diff line change
Expand Up @@ -79,6 +79,17 @@ void soc_mp_init(void)
soc_cpus_active[0] = true;
}

#ifdef CONFIG_ADSP_IMR_CONTEXT_SAVE
/*
* Called after exiting D3 state when context restore is enabled.
* Re-enables IDC interrupt again for all cores. Called once from core 0.
*/
void soc_mp_on_d3_exit(void)
{
soc_mp_init();
}
#endif

void soc_start_core(int cpu_num)
{
int retry = CORE_POWER_CHECK_NUM;
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9 changes: 9 additions & 0 deletions soc/xtensa/intel_adsp/ace/power.c
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Original file line number Diff line number Diff line change
Expand Up @@ -75,6 +75,14 @@ uint8_t *global_imr_ram_storage;
* @biref a d3 restore boot entry point
*/
extern void boot_entry_d3_restore(void);

/*
* @brief re-enables IDC interrupt for all cores after exiting D3 state
*
* Called once from core 0
*/
extern void soc_mp_on_d3_exit(void);

#else

/*
Expand Down Expand Up @@ -321,6 +329,7 @@ __weak void pm_state_exit_post_ops(enum pm_state state, uint8_t substate_id)
imr_layout->imr_state.header.imr_ram_storage = NULL;
sys_clock_idle_exit();
mem_window_idle_exit();
soc_mp_on_d3_exit();
}
#endif /* CONFIG_ADSP_IMR_CONTEXT_SAVE */
soc_cpus_active[cpu] = true;
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