Initial support for Ambiq Apollo4 Plus

MAINTAINERS.yml

@@ -178,6 +178,22 @@ MIPS arch:
   labels:
     - "area: MIPS"
 
+Ambiq Platforms:
+  status: maintained
+  maintainers:
+    - fkokosinski
+  collaborators:
+    - tgorochowik
+    - msobkowski
+  files:
+    - soc/arm/ambiq/
+    - boards/arm/apollo*/
+    - dts/arm/ambiq/
+    - dts/bindings/*/ambiq*
+    - drivers/*/*_ambiq*
+  labels:
+    - "platform: Ambiq"
+
 Bluetooth:
   status: maintained
   maintainers:
@@ -2828,6 +2844,17 @@ West:
   labels:
     - manifest-hal_altera
 
+"West project: hal_ambiq":
+  status: maintained
+  maintainers:
+    - fkokosinski
+  collaborators:
+    - tgorochowik
+    - msobkowski
+  files: []
+  labels:
+    - manifest-hal_ambiq
+
 "West project: hal_atmel":
   status: maintained
   maintainers:

boards/arm/apollo4p_evb/Kconfig.board

@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: Apache-2.0
+#
+# Copyright (c) 2023 Antmicro <www.antmicro.com>
+
+config BOARD_APOLLO4P_EVB
+	bool "Ambiq Apollo4 Plus Evaluation Board"
+	depends on SOC_APOLLO4P

boards/arm/apollo4p_evb/Kconfig.defconfig

@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: Apache-2.0
+#
+# Copyright (c) 2023 Antmicro <www.antmicro.com>
+
+config BOARD
+	default "apollo4p_evb"
+	depends on BOARD_APOLLO4P_EVB

boards/arm/apollo4p_evb/apollo4p_evb-pinctrl.dtsi

@@ -0,0 +1,19 @@
+/*
+ * Copyright (c) 2023 Antmicro <www.antmicro.com>
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <dt-bindings/pinctrl/ambiq-apollo4-pinctrl.h>
+
+&pinctrl {
+	uart0_default: uart0_default {
+		group1 {
+			pinmux = <UART0TX_P60>;
+		};
+		group2 {
+			pinmux = <UART0RX_P47>;
+			input-enable;
+		};
+	};
+};

boards/arm/apollo4p_evb/apollo4p_evb.dts

@@ -0,0 +1,23 @@
+/dts-v1/;
+#include <ambiq/ambiq_apollo4p.dtsi>
+
+#include "apollo4p_evb-pinctrl.dtsi"
+
+/ {
+	model = "Ambiq Apollo4 Plus evaluation board";
+	compatible = "ambiq,apollo4p_evb";
+	chosen {
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+		zephyr,console = &uart0;
+		zephyr,shell-uart = &uart0;
+		zephyr,uart-pipe = &uart0;
+	};
+};
+
+&uart0 {
+	current-speed = <115200>;
+	pinctrl-0 = <&uart0_default>;
+	pinctrl-names = "default";
+	status = "okay";
+};

boards/arm/apollo4p_evb/apollo4p_evb.yaml

@@ -0,0 +1,15 @@
+identifier: apollo4p_evb
+name: Apollo4P EVB
+type: mcu
+arch: arm
+ram: 2816
+flash: 1952
+toolchain:
+  - zephyr
+  - gnuarmemb
+supported:
+  - uart
+testing:
+  ignore_tags:
+    - net
+    - bluetooth

boards/arm/apollo4p_evb/apollo4p_evb_defconfig

@@ -0,0 +1,9 @@
+# SPDX-License-Identifier: Apache-2.0
+#
+# Copyright (c) 2023 Antmicro <www.antmicro.com>
+
+CONFIG_SOC_SERIES_APOLLO4X=y
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_INTERRUPT_DRIVEN=y

boards/arm/apollo4p_evb/board.cmake

@@ -0,0 +1,6 @@
+# Copyright (c) 2023 Antmicro <www.antmicro.com>
+# SPDX-License-Identifier: Apache-2.0
+
+board_runner_args(jlink "--device=AMAP42KK-KBR" "--iface=swd" "--speed=1000")
+
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

boards/arm/apollo4p_evb/doc/index.rst

@@ -0,0 +1,99 @@
+.. _apollo4p_evb:
+
+Ambiq Apollo4P EVB
+##################
+
+Apollo4P EVB is a board by Ambiq featuring their ultra-low power Apollo4 Plus SoC.
+
+.. image:: ./apollo4-plus-soc-eval-board.jpg
+   :align: center
+   :alt: Apollo4P EVB
+
+Hardware
+********
+
+- Apollo4 Plus SoC with upto 192 MHz operating frequency
+- ARM® Cortex® M4F core
+- 64 kB 2-way Associative/Direct-Mapped Cache per core
+- Up to 2 MB of non-volatile memory (NVM) for code/data
+- Up to 2.75 MB of low leakage / low power RAM for code/data
+- 384 kB Tightly Coupled RAM
+- 384 kB Extended RAM
+
+For more information about the Apollo4 Plus SoC and Apollo4P EVB board:
+
+- `Apollo4 Plus Website`_
+- `Apollo4 Plus Datasheet`_
+- `Apollo4P EVB Website`_
+
+Supported Features
+==================
+
+The Apollo4P EVB board configuration supports the following hardware features:
+
++-----------+------------+-------------------------------------+
+| Interface | Controller | Driver/Component                    |
++===========+============+=====================================+
+| MPU       | on-chip    | memory protection unit              |
++-----------+------------+-------------------------------------+
+| NVIC      | on-chip    | nested vector interrupt controller  |
++-----------+------------+-------------------------------------+
+| SYSTICK   | on-chip    | systick                             |
++-----------+------------+-------------------------------------+
+| STIMER    | on-chip    | stimer                              |
++-----------+------------+-------------------------------------+
+| GPIO      | on-chip    | gpio                                |
++-----------+------------+-------------------------------------+
+| UART      | on-chip    | serial                              |
++-----------+------------+-------------------------------------+
+
+The default configuration can be found in the defconfig file:
+``boards/arm/apollo4p_evb/apollo4p_evb_defconfig``.
+
+Programming and Debugging
+=========================
+
+Flashing an application
+-----------------------
+
+Connect your device to your host computer using the JLINK USB port.
+The sample application :ref:`hello_world` is used for this example.
+Build the Zephyr kernel and application, then flash it to the device:
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: apollo4p_evb
+   :goals: flash
+
+.. note::
+   `west flash` requires `SEGGER J-Link software`_ and `pylink`_ Python module
+   to be installed on you host computer.
+
+Open a serial terminal (minicom, putty, etc.) with the following settings:
+
+- Speed: 115200
+- Data: 8 bits
+- Parity: None
+- Stop bits: 1
+
+Reset the board and you should be able to see on the corresponding Serial Port
+the following message:
+
+.. code-block:: console
+
+   Hello World! apollo4p_evb
+
+.. _Apollo4 Plus Website:
+   https://ambiq.com/apollo4-plus/
+
+.. _Apollo4 Plus Datasheet:
+   https://contentportal.ambiq.com/documents/20123/388415/Apollo4-Plus-SoC-Datasheet.pdf
+
+.. _Apollo4P EVB Website:
+   https://www.ambiq.top/en/apollo4-plus-soc-eval-board
+
+.. _SEGGER J-Link software:
+   https://www.segger.com/downloads/jlink
+
+.. _pylink:
+   https://github.com/Square/pylink

drivers/pinctrl/CMakeLists.txt

@@ -4,6 +4,7 @@
 zephyr_library()
 zephyr_library_sources(common.c)
 zephyr_library_sources_ifdef(CONFIG_PINCTRL_TELINK_B91 pinctrl_b91.c)
+zephyr_library_sources_ifdef(CONFIG_PINCTRL_AMBIQ_APOLLO4 pinctrl_ambiq_apollo4.c)
 zephyr_library_sources_ifdef(CONFIG_PINCTRL_GD32_AF pinctrl_gd32_af.c)
 zephyr_library_sources_ifdef(CONFIG_PINCTRL_GD32_AFIO pinctrl_gd32_afio.c)
 zephyr_library_sources_ifdef(CONFIG_PINCTRL_ITE_IT8XXX2 pinctrl_ite_it8xxx2.c)

drivers/pinctrl/Kconfig

@@ -34,6 +34,7 @@ config PINCTRL_DYNAMIC
 	  peripheral at early boot stages depending on a certain input.
 
 source "drivers/pinctrl/Kconfig.b91"
+source "drivers/pinctrl/Kconfig.ambiq"
 source "drivers/pinctrl/Kconfig.gd32"
 source "drivers/pinctrl/Kconfig.it8xxx2"
 source "drivers/pinctrl/Kconfig.npcx"

drivers/pinctrl/Kconfig.ambiq

@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: Apache-2.0
+#
+# Copyright (c) 2023 Antmicro <www.antmicro.com>
+
+config PINCTRL_AMBIQ_APOLLO4
+	bool "Ambiq Apollo4 pin controller driver"
+	default y
+	depends on DT_HAS_AMBIQ_APOLLO4_PINCTRL_ENABLED
+	select AMBIQ_HAL
+	select AMBIQ_HAL_USE_GPIO
+	help
+	  Ambiq Apollo4 pinctrl driver

drivers/pinctrl/pinctrl_ambiq_apollo4.c

@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2023 Antmicro <www.antmicro.com>
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/drivers/pinctrl.h>
+
+/* ambiq-sdk includes */
+#include <am_mcu_apollo.h>
+
+static void pinctrl_configure_pin(const pinctrl_soc_pin_t *pin)
+{
+	am_hal_gpio_pincfg_t pin_config = {0};
+
+	pin_config.GP.cfg_b.uFuncSel = pin->alt_func;
+	pin_config.GP.cfg_b.eGPInput = pin->input_enable ? AM_HAL_GPIO_PIN_INPUT_ENABLE
+							 : AM_HAL_GPIO_PIN_INPUT_NONE;
+	pin_config.GP.cfg_b.eGPOutCfg = pin->push_pull    ? AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL
+					: pin->open_drain ? AM_HAL_GPIO_PIN_OUTCFG_OPENDRAIN
+					: pin->tristate   ? AM_HAL_GPIO_PIN_OUTCFG_TRISTATE
+							  : AM_HAL_GPIO_PIN_OUTCFG_DISABLE;
+	pin_config.GP.cfg_b.eDriveStrength = pin->drive_strength;
+	pin_config.GP.cfg_b.uSlewRate = pin->slew_rate;
+
+	if (pin->bias_pull_up) {
+		pin_config.GP.cfg_b.ePullup = pin->ambiq_pull_up_ohms + AM_HAL_GPIO_PIN_PULLUP_1_5K;
+	} else if (pin->bias_pull_down) {
+		pin_config.GP.cfg_b.ePullup = AM_HAL_GPIO_PIN_PULLDOWN_50K;
+	}
+
+	am_hal_gpio_pinconfig(pin->pin_num, pin_config);
+}
+
+int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintptr_t reg)
+{
+	ARG_UNUSED(reg);
+
+	for (uint8_t i = 0U; i < pin_cnt; i++) {
+		pinctrl_configure_pin(pins++);
+	}
+
+	return 0;
+}

drivers/serial/Kconfig.pl011

@@ -8,6 +8,7 @@ menuconfig UART_PL011
 	select SERIAL_HAS_DRIVER
 	select SERIAL_SUPPORT_INTERRUPT
 	select PINCTRL if SOC_EOS_S3
+	select PINCTRL if DT_HAS_AMBIQ_UART_ENABLED
 	help
 	  This option enables the UART driver for the PL011