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Add support of h3ulcb and salvator xs m3 arm64 boards #57172
Add support of h3ulcb and salvator xs m3 arm64 boards #57172
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soc/arm64/renesas_rcar/gen3/soc.h
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* | ||
*/ | ||
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#ifndef _SOC__H_ |
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-1 to soc.h, not needed for ARM64
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deleted
soc/arm64/renesas_rcar/gen3/soc.c
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#include <zephyr/arch/cpu.h> | ||
#include <zephyr/device.h> | ||
#include <zephyr/init.h> | ||
#include <zephyr/kernel.h> | ||
#include <soc.h> | ||
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/** | ||
* | ||
* @brief Perform basic hardware initialization | ||
* | ||
* @return 0 | ||
*/ | ||
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static int soc_init(void) | ||
{ | ||
/* Install default handler that simply resets the CPU | ||
* if configured in the kernel, NOP otherwise | ||
*/ | ||
return 0; | ||
} | ||
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SYS_INIT(soc_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT); |
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this file does nothing
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*/ | ||
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#ifndef ZEPHYR_SOC_ARM_RENESAS_RCAR_GEN3_PINCTRL_SOC_H_ |
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nit: add a separate commit introducing pinctrl?
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fixed
Add associative tables for core and mod clocks. Add possibility to enable/disable any of core clocks which presents in the associative table. Add handler for setting rate to driver and use generic rcar cpg function for getting rate. Signed-off-by: Mykola Kvach <[email protected]>
Delete IRQ lock/unlock calls from 'rcar_cpg_mstp_clock_endisable', because 'rcar_cpg_mstp_clock_endisable' function is always called under spin lock. Signed-off-by: Mykola Kvach <[email protected]>
Add MMIO mapping for Renesas CPG driver in order to avoid mappings inside mmu_regions.c file. Remove MMU region for Renesas CPG driver. Signed-off-by: Mykola Kvach <[email protected]>
Add files for supporting arm64 Renesas r8a77951 SoC. Add config option CPU_CORTEX_A57. Enable build of clock_control_r8a7795_cpg_mssr.c for a new ARM64 SoC R8A77951. Signed-off-by: Mykola Kvach <[email protected]>
Add Pin Function Controller tables of registers and their bits for ARM64 Renesas R-Car family. With this changes we can use Renesas PFC driver for configuring bias and driving capabilities. Note: some of files copy-pasted from Renesas Arm 32 SoC directory and this commit is a temporary solution, we need to rework it in order to use the same source files for both architectures. Signed-off-by: Mykola Kvach <[email protected]>
Add basic functionality for supporting h3ulcb board: * add documentation for h3ulcb board; * add pinctrl dtsi for scif driver; * add dts, yaml and configuration files. Signed-off-by: Mykola Kvach <[email protected]>
Add support of r8a77961 SoC to gen3 series. Create a dtsi file with a common part for both r8a77951 and r8a77961. Signed-off-by: Mykola Kvach <[email protected]>
Add Pin Function Controller tables of registers and their bits for ARM64 Renesas R-Car family. With this changes we can use Renesas PFC driver for configuring bias and driving capabilities. Add only needed driver strength and bias pins to PFC, e.g. SDx and UART TX/RX pins. Signed-off-by: Mykola Kvach <[email protected]>
Add support of 'rcar_salvator_xs_m3' board: minimal dts and configuration. Signed-off-by: Mykola Kvach <[email protected]>
Renesas R-Car ARM64 platforms entry has been added to maintainers list. lorc (Volodymyr Babchuk <[email protected]>) will be a maintainer of the Renesas R-Car boards based on ARMv8. Signed-off-by: Mykola Kvach <[email protected]> Acked-by: Volodymyr Babchuk <[email protected]>
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rebased onto the latest changes + added |
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For the arch part
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For adding me as a maintainer
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MCUmgr is OK.
Compliance failure is the usual pin control typedef. |
In fact PR wasn't ready to be merged, I was working on the clock changes review as it is containing errors and kept my "change needed" while doing it. |
Next time please keep it in draft state until ready to be merged. |
I'm not PR author, was I able to do that ? |
I said that I was working on the clock control review (but not updated my status) as maintainer, but anyway, I'll fix it on another PR ! |
Feel free to write comments about any issues you've found in the CPG driver here. If you'd like, I can address them and open a new pull request. |
Add generic Renesas functions to CPG for getting/setting rates of clocks. Add associated tables of clocks and API for working with these tables.
Add MMIO mapping for PFC, UART and CPG Renesas drivers in order to avoid mappings inside
mmu_regions.c
file(s).Added files for supporting ARM64 Renesas
r8a77951
/r8a77961
SoCs:* add dtsi for
r8a77951
/r8a77961
soc;* files for support PFC;
Add basic support of
rcar_salvator_xs_m3
andrcar_h3ulcb_ca57
ARM64 boards.