ADSP: align a variable on a cache-line size border

power_down() locks the cache line, containing the address, passed to
the function in its second argument. However, current builds cause an
"alloca" DSP exception when trying to lock that cache line. Aligning
that variable on a cache-line size border fixes the problem.

Signed-off-by: Guennadi Liakhovetski <[email protected]>

soc/xtensa/intel_adsp/ace/power.c

@@ -303,7 +303,7 @@ void pm_state_set(enum pm_state state, uint8_t substate_id)
 					(void *)rom_entry;
 			sys_cache_data_flush_range(imr_layout, sizeof(*imr_layout));
 #endif /* CONFIG_ADSP_IMR_CONTEXT_SAVE */
-			uint32_t hpsram_mask = 0;
+			uint32_t hpsram_mask __aligned(64) = 0;
 #ifdef CONFIG_ADSP_POWER_DOWN_HPSRAM
 			/* turn off all HPSRAM banks - get a full bitmap */
 			uint32_t ebb_banks = ace_hpsram_get_bank_count();