soc: riscv: andes_v5: enlarge TEST_EXTRA_STACK_SIZE

Enlarge TEST_EXTRA_STACK_SIZE for AE350 RV64 bitstream. Signed-off-by: Jimmy Zheng <[email protected]>
zephyrproject-rtos · Jun 28, 2023 · abce0eb · abce0eb
1 parent 2594ca2
commit abce0eb
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/soc/riscv/riscv-privileged/andes_v5/Kconfig.defconfig.ae350 b/soc/riscv/riscv-privileged/andes_v5/Kconfig.defconfig.ae350
@@ -19,7 +19,7 @@ config PRIVILEGED_STACK_SIZE
 	default 2048 if 64BIT
 
 config TEST_EXTRA_STACK_SIZE
-	default 1024
+	default 2048 if 64BIT
 
 config MP_MAX_NUM_CPUS
 	default 1