RISCV: Support pm cpu ops for SMP

Add pm cpu ops to call the platform specific implementations for bringing up secondary cores. Signed-off-by: Lingutla Chandrasekhar <[email protected]>
zephyrproject-rtos · Oct 11, 2023 · 95705d5 · 95705d5
1 parent 9ceb8ce
commit 95705d5
Showing 1 changed file with 14 additions and 0 deletions.
diff --git a/arch/riscv/core/smp.c b/arch/riscv/core/smp.c
@@ -9,6 +9,7 @@
 #include <ksched.h>
 #include <zephyr/irq.h>
 #include <zephyr/sys/atomic.h>
+#include <zephyr/drivers/pm_cpu_ops.h>
 
 volatile struct {
 	arch_cpustart_t fn;
@@ -18,6 +19,10 @@ volatile struct {
 volatile uintptr_t riscv_cpu_wake_flag;
 volatile void *riscv_cpu_sp;
 
+#ifdef CONFIG_PM_CPU_OPS
+extern void __start(void);
+#endif
+
 void arch_start_cpu(int cpu_num, k_thread_stack_t *stack, int sz,
 		    arch_cpustart_t fn, void *arg)
 {
@@ -27,6 +32,15 @@ void arch_start_cpu(int cpu_num, k_thread_stack_t *stack, int sz,
 	riscv_cpu_sp = Z_KERNEL_STACK_BUFFER(stack) + sz;
 	riscv_cpu_wake_flag = _kernel.cpus[cpu_num].arch.hartid;
 
+#ifdef CONFIG_PM_CPU_OPS
+	uintptr_t entry = (uintptr_t)&__start;
+
+	if (pm_cpu_on(cpu_num, entry)) {
+		printk("Failed to boot secondary CPU %d\n", cpu_num);
+		return;
+	}
+#endif
+
 	while (riscv_cpu_wake_flag != 0U) {
 		;
 	}