boards: riscv: Bring up WCH CH56(5/9)W-EVT

CH565W-EVT and CH569W-EVT are boards by WCH for the evaluation of
CH565W and CH569W chips.

Signed-off-by: Chen Xingyu <[email protected]>

CODEOWNERS

@@ -178,6 +178,8 @@
 /boards/posix/                            @aescolar @daor-oti
 /boards/posix/nrf52_bsim/                 @aescolar @wopu-ot
 /boards/riscv/                            @kgugala @pgielda
+/boards/riscv/ch565w_evt/                 @xingrz
+/boards/riscv/ch569w_evt/                 @xingrz
 /boards/riscv/rv32m1_vega/                @dleach02
 /boards/riscv/adp_xc7k_ae350/             @cwshu @kevinwang821020 @jimmyzhe
 /boards/riscv/longan_nano/                @soburi

boards/riscv/ch565w_evt/Kconfig.board

@@ -0,0 +1,6 @@
+# Copyright (c) 2023 Chen Xingyu <[email protected]>
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_CH565W_EVT
+	bool "WCH CH565W-EVT"
+	depends on SOC_CH565

boards/riscv/ch565w_evt/Kconfig.defconfig

@@ -0,0 +1,9 @@
+# Copyright (c) 2023 Chen Xingyu <[email protected]>
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_CH565W_EVT
+
+config BOARD
+	default "ch565w_evt"
+
+endif # BOARD_CH565W_EVT

boards/riscv/ch565w_evt/board.cmake

@@ -0,0 +1,4 @@
+# Copyright (c) 2023 Chen Xingyu <[email protected]>
+# SPDX-License-Identifier: Apache-2.0
+
+include(${ZEPHYR_BASE}/boards/common/wchisp.board.cmake)

boards/riscv/ch565w_evt/ch565w_evt.dts

@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2023 Chen Xingyu <[email protected]>
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+
+#include <zephyr/dt-bindings/gpio/gpio.h>
+#include <wch/ch565w.dtsi>
+
+/ {
+	model = "WCH CH565W-EVT";
+	compatible = "wch,ch565w-evt";
+
+	aliases {
+		led0 = &led_0;
+		led1 = &led_1;
+		led2 = &led_2;
+	};
+
+	chosen {
+		zephyr,sram = &rams;
+		zephyr,flash = &flash;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_0: led-0 {
+			gpios = <&gpioa 9 GPIO_ACTIVE_LOW>;
+			label = "LED0";
+		};
+
+		led_1: led-1 {
+			gpios = <&gpiob 22 GPIO_ACTIVE_LOW>;
+			label = "LED1";
+		};
+
+		led_2: led-2 {
+			gpios = <&gpiob 23 GPIO_ACTIVE_LOW>;
+			label = "LED2";
+		};
+	};
+};

boards/riscv/ch565w_evt/ch565w_evt.yaml

@@ -0,0 +1,11 @@
+identifier: ch565w_evt
+name: WCH CH565W-EVT
+type: mcu
+arch: riscv32
+toolchain:
+  - zephyr
+supported:
+  - clock
+  - gpio
+  - interrupt-controller
+  - timer

boards/riscv/ch565w_evt/ch565w_evt_defconfig

@@ -0,0 +1,6 @@
+# Copyright (c) 2023 Chen Xingyu <[email protected]>
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_SOC_SERIES_CH56X=y
+CONFIG_SOC_CH565=y
+CONFIG_BOARD_CH565W_EVT=y

boards/riscv/ch565w_evt/doc/index.rst

@@ -0,0 +1,72 @@
+.. _ch565w_evt:
+
+CH565W-EVT
+##########
+
+Overview
+********
+
+The CH565W-EVT is a evaluation board for the CH565 chip.
+
+CH565/9 is a member of the QingKe V3A family developed by WCH.
+
+Hardware
+********
+- QingKe V3A RISC-V RV32IMAC core, running up to 120MHz
+- 448KB Flash
+- 32/64/96KB + 16KB SRAM
+- 49 GPIOs
+- 4 UARTs
+- 2 SPIs
+- 1 DVP
+- USB 2.0 High Speed
+- USB 3.0 Super Speed
+
+Supported Features
+==================
+The CH565W-EVT supports the following features:
+
+.. list-table::
+   :header-rows: 1
+
+   * - Peripheral
+     - Kconfig option
+     - Devicetree compatible
+   * - GPIO
+     - N/A
+     - :dtcompatible:`wch,ch56x-gpio`
+   * - HCLK
+     - N/A
+     - :dtcompatible:`wch,ch56x-hclk`
+   * - PFIC
+     - N/A
+     - :dtcompatible:`wch,qingke-pfic`
+   * - SYSTICK
+     - N/A
+     - :dtcompatible:`wch,qingke-v3-systick`
+
+Other hardware features have not been enabled yet for this board.
+
+Programming and Debugging
+*************************
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/basic/blinky
+   :board: ch565w_evt
+   :goals: build flash
+
+Flashing
+========
+
+The WCH MCUs can be flashed via USB (using WCHISPTool), or via WCH-Link.
+
+WCHISPTool
+----------
+
+`WCHISPTool_CMD <https://wch-ic.com/downloads/WCHISPTool_CMD_ZIP.html>`_ is required
+to flash the board. Add it to the `PATH` environment variable, and refer to the
+tool's documentation for generating the device configuration file.
+
+.. code-block:: console
+
+	west flash --device XXXX --cfg-file /path/to/CH565.ini

boards/riscv/ch569w_evt/Kconfig.board

@@ -0,0 +1,6 @@
+# Copyright (c) 2023 Chen Xingyu <[email protected]>
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_CH569W_EVT
+	bool "WCH CH569W-EVT"
+	depends on SOC_CH569

boards/riscv/ch569w_evt/Kconfig.defconfig

@@ -0,0 +1,9 @@
+# Copyright (c) 2023 Chen Xingyu <[email protected]>
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_CH569W_EVT
+
+config BOARD
+	default "ch569w_evt"
+
+endif # BOARD_CH569W_EVT

boards/riscv/ch569w_evt/board.cmake

@@ -0,0 +1,4 @@
+# Copyright (c) 2023 Chen Xingyu <[email protected]>
+# SPDX-License-Identifier: Apache-2.0
+
+include(${ZEPHYR_BASE}/boards/common/wchisp.board.cmake)

boards/riscv/ch569w_evt/ch569w_evt.dts

@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2023 Chen Xingyu <[email protected]>
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+
+#include <zephyr/dt-bindings/gpio/gpio.h>
+#include <wch/ch569w.dtsi>
+
+/ {
+	model = "WCH CH569W-EVT";
+	compatible = "wch,ch569w-evt";
+
+	aliases {
+		led0 = &led_0;
+		led1 = &led_1;
+		led2 = &led_2;
+	};
+
+	chosen {
+		zephyr,sram = &rams;
+		zephyr,flash = &flash;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_0: led-0 {
+			gpios = <&gpiob 24 GPIO_ACTIVE_LOW>;
+			label = "LED0";
+		};
+
+		led_1: led-1 {
+			gpios = <&gpiob 22 GPIO_ACTIVE_LOW>;
+			label = "LED1";
+		};
+
+		led_2: led-2 {
+			gpios = <&gpiob 23 GPIO_ACTIVE_LOW>;
+			label = "LED2";
+		};
+	};
+};

boards/riscv/ch569w_evt/ch569w_evt.yaml

@@ -0,0 +1,11 @@
+identifier: ch569w_evt
+name: WCH CH569W-EVT
+type: mcu
+arch: riscv32
+toolchain:
+  - zephyr
+supported:
+  - clock
+  - gpio
+  - interrupt-controller
+  - timer

boards/riscv/ch569w_evt/ch569w_evt_defconfig

@@ -0,0 +1,6 @@
+# Copyright (c) 2023 Chen Xingyu <[email protected]>
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_SOC_SERIES_CH56X=y
+CONFIG_SOC_CH569=y
+CONFIG_BOARD_CH569W_EVT=y

boards/riscv/ch569w_evt/doc/index.rst

@@ -0,0 +1,72 @@
+.. _ch569w_evt:
+
+CH569W-EVT
+##########
+
+Overview
+********
+
+The CH569W-EVT is a evaluation board for the CH569 chip.
+
+CH569/9 is a member of the QingKe V3A family developed by WCH.
+
+Hardware
+********
+- QingKe V3A RISC-V RV32IMAC core, running up to 120MHz
+- 448KB Flash
+- 32/64/96KB + 16KB SRAM
+- 49 GPIOs
+- 4 UARTs
+- 2 SPIs
+- 1 HSPI
+- USB 2.0 High Speed
+- USB 3.0 Super Speed
+
+Supported Features
+==================
+The CH569W-EVT supports the following features:
+
+.. list-table::
+   :header-rows: 1
+
+   * - Peripheral
+     - Kconfig option
+     - Devicetree compatible
+   * - GPIO
+     - N/A
+     - :dtcompatible:`wch,ch56x-gpio`
+   * - HCLK
+     - N/A
+     - :dtcompatible:`wch,ch56x-hclk`
+   * - PFIC
+     - N/A
+     - :dtcompatible:`wch,qingke-pfic`
+   * - SYSTICK
+     - N/A
+     - :dtcompatible:`wch,qingke-v3-systick`
+
+Other hardware features have not been enabled yet for this board.
+
+Programming and Debugging
+*************************
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/basic/blinky
+   :board: ch569w_evt
+   :goals: build flash
+
+Flashing
+========
+
+The WCH MCUs can be flashed via USB (using WCHISPTool), or via WCH-Link.
+
+WCHISPTool
+----------
+
+`WCHISPTool_CMD <https://wch-ic.com/downloads/WCHISPTool_CMD_ZIP.html>`_ is required
+to flash the board. Add it to the `PATH` environment variable, and refer to the
+tool's documentation for generating the device configuration file.
+
+.. code-block:: console
+
+	west flash --device XXXX --cfg-file /path/to/CH569.ini