intel_adsp: ace: clock gating in idle #106346
tmlemancompliance.yml
on: pull_request
Run compliance checks on patch series (PR)
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Annotations
9 errors
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C99_COMMENTS:
soc/xtensa/intel_adsp/ace/power.c#L391
soc/xtensa/intel_adsp/ace/power.c:391 do not use C99 // comments
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ELSE_AFTER_BRACE:
soc/xtensa/intel_adsp/ace/power.c#L395
soc/xtensa/intel_adsp/ace/power.c:395 else should follow close brace '}'
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TRAILING_WHITESPACE:
soc/xtensa/intel_adsp/common/clk.c#L188
soc/xtensa/intel_adsp/common/clk.c:188 trailing whitespace
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Run compliance checks on patch series (PR)
Process completed with exit code 4.
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Run compliance checks on patch series (PR):
GitDiffCheck.txt#L1
Git conflict markers and whitespace errors are not allowed in added changes
12423fc984614fccc957ba639ad2ab11427aba44: soc/xtensa/intel_adsp/common/clk.c:188: trailing whitespace.
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Run compliance checks on patch series (PR):
Checkpatch.txt#L1
See https://docs.zephyrproject.org/latest/contribute/guidelines.html#coding-style for more details.
C99_COMMENTS: do not use C99 // comments
File:soc/xtensa/intel_adsp/ace/power.c
Line:391
ELSE_AFTER_BRACE: else should follow close brace '}'
File:soc/xtensa/intel_adsp/ace/power.c
Line:395
TRAILING_WHITESPACE: trailing whitespace
File:soc/xtensa/intel_adsp/common/clk.c
Line:188
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Run compliance checks on patch series (PR):
KconfigBasicNoModules.txt#L1
See https://docs.zephyrproject.org/latest/build/kconfig/tips.html for more details.
Boolean option 'PM_IDLE_POWER_OPTIMIZATIONS' prompt must not start with 'Enable...'. Please
check Kconfig guidelines.
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Run compliance checks on patch series (PR):
Kconfig.txt#L1
See https://docs.zephyrproject.org/latest/build/kconfig/tips.html for more details.
Boolean option 'PM_IDLE_POWER_OPTIMIZATIONS' prompt must not start with 'Enable...'. Please
check Kconfig guidelines.
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Run compliance checks on patch series (PR)
Process completed with exit code 1.
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Artifacts
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compliance.xml
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2.17 KB |
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