drivers: Modification of IFX ADC driver to function with new platform #152721
mcatee-infineoncompliance.yml
on: pull_request
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ClangFormat.txt#L1
See https://docs.zephyrproject.org/latest/contribute/guidelines.html#clang-format for more details.
You may want to run clang-format on this change:
-#define IFX_ADC_NUM_CHANNELS \
- ARRAY_SIZE(cyhal_pin_map_adcmic_gpio_adc_in)
+#define IFX_ADC_NUM_CHANNELS ARRAY_SIZE(cyhal_pin_map_adcmic_gpio_adc_in)
File:drivers/adc/adc_ifx_cat1.c
Line:41
You may want to run clang-format on this change:
-#if defined(CONFIG_SOC_FAMILY_INFINEON_CAT1B) && \
- defined(CONFIG_USE_INFINEON_ADC)
+#if defined(CONFIG_SOC_FAMILY_INFINEON_CAT1B) && defined(CONFIG_USE_INFINEON_ADC)
File:drivers/clock_control/clock_control_ifx_cat1.c
Line:538
You may want to run clang-format on this change:
-#define REGION_BOOTSTRAP_RAM_ATTR(base, size) \
- { \
- .rbar = FULL_ACCESS_Msk | NON_SHAREABLE_Msk, \
- .mair_idx = MPU_MAIR_INDEX_SRAM, \
- .r_limit = REGION_LIMIT_ADDR(base, size), \
+#define REGION_BOOTSTRAP_RAM_ATTR(base, size) \
+ { \
+ .rbar = FULL_ACCESS_Msk | NON_SHAREABLE_Msk, \
+ .mair_idx = MPU_MAIR_INDEX_SRAM, \
+ .r_limit = REGION_LIMIT_ADDR(base, size), \
File:soc/infineon/cat1b/cyw20829/mpu_regions.c
Line:18
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You may want to run clang-format on this change:
drivers/adc/adc_ifx_cat1.c#L41
drivers/adc/adc_ifx_cat1.c:41
-#define IFX_ADC_NUM_CHANNELS \
- ARRAY_SIZE(cyhal_pin_map_adcmic_gpio_adc_in)
+#define IFX_ADC_NUM_CHANNELS ARRAY_SIZE(cyhal_pin_map_adcmic_gpio_adc_in)
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You may want to run clang-format on this change:
drivers/clock_control/clock_control_ifx_cat1.c#L538
drivers/clock_control/clock_control_ifx_cat1.c:538
-#if defined(CONFIG_SOC_FAMILY_INFINEON_CAT1B) && \
- defined(CONFIG_USE_INFINEON_ADC)
+#if defined(CONFIG_SOC_FAMILY_INFINEON_CAT1B) && defined(CONFIG_USE_INFINEON_ADC)
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You may want to run clang-format on this change:
soc/infineon/cat1b/cyw20829/mpu_regions.c#L18
soc/infineon/cat1b/cyw20829/mpu_regions.c:18
-#define REGION_BOOTSTRAP_RAM_ATTR(base, size) \
- { \
- .rbar = FULL_ACCESS_Msk | NON_SHAREABLE_Msk, \
- .mair_idx = MPU_MAIR_INDEX_SRAM, \
- .r_limit = REGION_LIMIT_ADDR(base, size), \
+#define REGION_BOOTSTRAP_RAM_ATTR(base, size) \
+ { \
+ .rbar = FULL_ACCESS_Msk | NON_SHAREABLE_Msk, \
+ .mair_idx = MPU_MAIR_INDEX_SRAM, \
+ .r_limit = REGION_LIMIT_ADDR(base, size), \
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compliance.xml
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