Fix lattice bscan nexus in clearSRAM() #399
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For NEXUS family fpgas, the Bscan register is 362 bits long or 45.25 bytes => 46 bytes. This error was already correct when programming the sram. clearSRAM() is instead used when programming the spi flash memory.
| memset(tx_buf, 0xff, 26); | ||
| wr_rd(0x1C, tx_buf, 26, NULL, 0); | ||
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| wr_rd(0xFf, NULL, 0, NULL, 0); |
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This operation isn't required?
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more precisely wr_rdat line 712
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mmhh, I may have deleted it accidentally. I'll check tomorrow (I created an svf file from Radiant) and test it on a board.
Thanks for pointing it out!
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I've tried with and without and I don't see differences in execution. I don't see it in the svf file that I create from Radiant, but who knows. If you prefer to keep it, then it's ok with me :)
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Hej! :)
Just to avoid misunderstandings: is there something I need to do about this pull request?
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Sorry: my fault I have missed to answer.
In fact this code is used by all lattice devices so it's maybe more secure to keep/re-add 0xff instruction.
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Thanks for answering.
I've restored that line :)
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Applied. Thanks @bg-gsl |
For NEXUS family fpgas, the Bscan register is 362 bits long or 45.25 bytes => 46 bytes.
This error was already corrected in
program_mem(to program the sram).In our case, we were interested in programming the external SPI Flash memory.
Tests have been carried out successfully on Certus-NX Versa, Crosslink-NX Evalualtion, CertusPro-NX Versa and GR740mini.
On CertusPro-NX Evaluation board instead, results were mixed: if the spi flash was not already programmed, then things were going fine. Otherwise, openFPGALoader doesn't manage to read/talk to the SPI Flash memory. We've already had issues with such board when programming the spi flash, so it may be that the sample we have in office is not working well.