Alpha release

Latest binaries released here: v1.9.7

• Old draw block has been replaced with an F# draw library

Full list of changes

• New component
  • Viewer component can be added to any net on any sheet, and will allow both Step and Wave simulation to see the net it is attached to, even if this is a subsheet.
• Gates
  • New-style IEEE rectangular 2 input gates replace old-style different shape gates
  • See also future works
• Keybinds
  • Copy: Ctrl+C
  • Paste: Ctrl+V
  • Undo: Ctrl+Z
  • Redo: Ctrl+Y
  • Save: Ctrl+S
  • Zoom in application: Ctrl+Shift+=
  • Zoom out application: Ctrl+Shift+-
  • Zoom in canvas: Shift+=
  • Zoom out canvas: Shift+-
  • Zoom in/out canvas: Ctrl+Mousewheel
  • Zoom canvas to fit screen: Ctrl+W
  • Select all: Ctrl+A
  • Cancel operation: Esc
• UI
  • Drag mouse left click creates a selection box
  • Holding Ctrl toggles selection
• Features / Bugfixes
  • Verilog output (experimental)
    • Circuit can be output as a single Verilog file for synthesis or Verilog 3rd party simulation
    • Current output file, pasted into online Icarus v10 Verilog simulator, prints out the simulation, seems to work on some big designs.
  • Simulation
    • New fast simulation released informally in v1.2.0
    • Fixes all previous bugs (completely)
    • Robust algorithm - designed for quick fixes if there are any alpha bugs
    • Approx 10X faster than old simulation.
  • Manual wire routing
    • Left click and drag a wire to move it manually
    • Move an attached component to reset to automatic routing
    • UPDATES TO COME: This current system is not ideal, and a better version of it is high on the priority list
  • Adding/pasting components
    • Adding a component will no longer spawn it at a random canvas position
    • Click to drop implemented
    • Upon selecting the component in the catalogue, move the mouse and click to place the component
    • When pasting, upon pressing Ctrl+V the copied components will be shown at the mouse location, and can be placed anywhere that does not overlap components
    • Overlapping components will be shown in red
  • Automatic label naming
    • Pasting copied symbols will automatically update the names by altering (or adding) the number suffix
  • Subsheets (AKA "custom components")
    • On changing the inputs or outputs of a sheet used as a subsheet all of its instances are updated
    • Where ports can be matched existing connections will remain connected
  • Saving
    • Autosave has been removed as ISSIE no longer crashes randomly
    • The 'Save' button will be opaque and green if there are unsaved changes
    • Switching sheet will save changes automatically
    • If you try to exit the program with unsaved changes, a prompt will come up asking if you wish to close without saving, or go back and save
  • Sheet corruption fixed
  • Undo/Redo
    • Now undoes/redoes an entire pasted section rather than 1 by 1
  • Memories ROM/RAM
    • ROM or initial RAM contents may be exported to files, or imported from them
    • New signed and unsigned multiplier ROM option
  • Waveform simulator
    • Remembers previous order
    • Preselection
  • Constant components
    • Constants can be entered in signed or unsigned decimal, hex, binary
    • Constant components remember and display the format in which the number was entered (e.g. 0xff instead of -1)
    • Constant properties display different representations of constant
    • Constants can now be up to 64 bit in length.
• Lag/latency
  • Vastly improved most slow operations (right hand tab, load project, change sheet, waveform simulation etc)
  • Throttling has been added so that in the event of slow hardware or if you are doing large operations e.g. moving many components at once, the program will drop frames in order to prevent lag. In this case it will appear more stuttery, but be more responsive and useable. Most people should not notice any stuttering problems.