Spirea: A Mechanized Concurrent Separation Logic for Weak Persistent Memory #215
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Spirea: A Mechanized Concurrent Separation Logic for Weak Persistent Memory
Weak persistent memory a.k.a. nonvolatile memory is an emerging technology that offers fast byteaddressable durable main memory. A wealth of algorithms and libraries has been developed to explore this exciting technology. As noted by others, this has led to a significant verification gap. Towards closing this gap, we present Spirea, the first concurrent separation logic for verification of programs under a weak persistent memory model. Spirea is based on the Iris and Perennial verification frameworks, and by combining features from these logics with novel techniques it supports highlevel modular reasoning about crashsafe and threadsafe programs and libraries. Spirea is fully mechanized in the Coq proof assistant and allows for interactive development of proofs with the Iris Proof Mode. We use Spirea to verify several challenging examples with modular specifications. We show how our logic can verify threadsafety and crashsafety of nonblocking durable data structures with nullrecovery, in particular the Treiber stack and the MichaelScott queue adapted to persistent memory. This is the first time durable data structures have been verified with a program logic.
Vindum, Simon Friis, and Lars Birkedal. “Spirea: A Mechanized Concurrent Separation Logic for Weak Persistent Memory. Proceedings of the ACM on Programming Languages, vol. 7, no. OOPSLA2, Oct. 2023, pp. 63257. Crossref, https://doi.org/10.1145/3622820.
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