Questions reg. UART and SPI demo

[vinith32]

1). Hi, your work on NEORV32 is amazing. I am trying to simulate the examples. Im getting hello world and hello cpp output via UART, but when i run _DEMO_SPI, the simulation is freezed and getting max runtime error.

2). so every example, sw/simple/testbench's output is displayed in the console VIA UART. So, actually where it is defined.

3). In the example files, can we call them as "c test cases" ?

4). So, we have a uart receiver in sim/simple. So, how to send value from the testbench, so that the uart receiver can receive?

[stnolting]

Hey @vinith32.

Hi, your work on NEORV32 is amazing.

Thank you very much! :)

I am trying to simulate the examples. Im getting hello world and hello cpp output via UART, but when i run _DEMO_SPI, the simulation is freezed and getting max runtime error.

The demo_spi program provides an interactive console (via UART) to allow the user to execute manual SPI transmissions;

neorv32/sw/example/demo_spi/main.c

Line 40 in f9a2801

* This program provides an interactive console to communicate with SPI devices.

When simulating this program, there is no UART input. So this program will just wait for input until the simulation terminates.

so every example, sw/simple/testbench's output is displayed in the console VIA UART. So, actually where it is defined.

That depends on the compile switches. If you compile with USER_FLAGS+=-DUART0_SIM_MODE all UART0 outputs are redirected to the simulator console. We tried to explain this in 📚 2.7.13. Primary Universal Asynchronous Receiver and Transmitter (UART0) (subsection "Simulation Mode").

In the example files, can we call them as "c test cases" ?

Yes, basically all example programs are also some kind of test programs as they target each individual peripheral module.

So, we have a uart receiver in sim/simple. So, how to send value from the testbench, so that the uart receiver can receive?

Unfortunately, there is no default sim_tx -> core_rx mechanism right now. We just have a simulated UART receiver. But it should not be too hard to add the TX counterpart I think. 🤔

[vinith32]

Ok sir. So, here demo_spi can be simualted by enabling the inbuilt SPI using the testbench or it needed a real external spi device?

[stnolting]

Sure, you can simulate the demp_spi program, but nothing will happen in the simulation 😉

Furthermore, the SPI port is not connected to any simulated device inside the testbench - there is just some kind of local echo that connects the SPI module (SPI host) to the SDI (SPI device):

neorv32/sim/neorv32_tb.vhd

Lines 320 to 329 in cbfd473

	-- SPI (available if IO_SPI_EN = true) --
	spi_clk_o => spi_clk, -- SPI serial clock
	spi_dat_o => spi_do, -- controller data out, peripheral data in
	spi_dat_i => spi_di, -- controller data in, peripheral data out
	spi_csn_o => spi_csn, -- SPI CS
	-- SDI (available if IO_SDI_EN = true) --
	sdi_clk_i => sdi_clk, -- SDI serial clock
	sdi_dat_o => sdi_do, -- controller data out, peripheral data in
	sdi_dat_i => sdi_di, -- controller data in, peripheral data out
	sdi_csn_i => sdi_csn, -- chip-select