SPI_demo not simulating.

[vinith32]

1). Hi, your work on NEORV32 is amazing. I am trying to simulate the examples. Im getting hello world and hello cpp output via UART, but when i run _DEMO_SPI, the simulation is freezed and getting max runtime error.

2). so every example, sw/simple/testbench's output is displayed in the console VIA UART. So, actually where it is defined.

3). In the example files, can we call them as "c test cases" ?

4). So, we have a uart receiver in sim/simple. So, how to send value from the testbench, so that the uart receiver can receive?

THIS IS NOT FOR VERILOG VERSION, IM ASKING FOR VHDL VERSION. THANK YOU.

[stnolting]

This is just a copy of stnolting/neorv32#1080, right?

[vinith32]

Yes sir. It can be closed. Sorry for posting twice.

[stnolting]

No worries!