registers

cpu.html

@@ -51,7 +51,14 @@
 sends back the associated address to the Instruction register. Next, opcode,
 or the first 4 bits of the address corresponds to Load-A instruction.
 The other bits of the address correspond to a dram address.
-Next, instructions are decoded and interpreted by the Control Unit.
+Here are some registers.... General-purpose register, stack pointer,
+status flag register, vector registor, control register... accumulator           =  stores data for ALU
+program counter       =  points to next instruction
+instruction register  =  stores instruction
+data register         =  stores data
+address register      =  stores address
+temporary register    =  stores temporary data
+input/ouput registers =  stores input and output data
 
 control unit () = which is responsible for decoding and executing instructions, determines
 how to translate each high-level instruction into the appropriate micro-operations.

index.html

@@ -10,7 +10,7 @@
 <a class="hl-hover" href="qfmtsp.html#fmt-anch">  61 l      &#9656;format specifier  ▂▄__                    start here</a>
 <a class="hl-hover" href="qfmtsp.html#storage-class-anch">  61 l      &#9656;storage class specifier</a>
 <a class="hl-hover" href="qfmtsp.html#type-qualifier-anch">  61 l      &#9656;type qualifier</a>
-<a class="hl-hover" href="ptr.html#ptr-anch">  65 l      &#9656;pointer</a>
+<a class="hl-hover" href="ptr.html#ptr-anch">  79 l      &#9656;pointer</a>
 <a class="hl-hover" href="func.html#data-anch">  166l      &#9656;data type    ▂▄▆_</a>
 <a class="hl-hover" href="func.html#void-anch">  166l      &#9656;void function</a>
 <a class="hl-hover" href="func.html#variadic-anch">  166l      &#9656;variadic function</a>