[AMDGPU] clang-tidy: use std::make_unique. NFC.

sgundapa · Jul 23, 2024 · 2f8de7c · 2f8de7c
1 parent 4b5ff0b
commit 2f8de7c
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Showing 4 changed files with 20 additions and 16 deletions.
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
@@ -344,13 +344,13 @@ bool AMDGPUAsmPrinter::doInitialization(Module &M) {
   if (TM.getTargetTriple().getOS() == Triple::AMDHSA) {
     switch (CodeObjectVersion) {
     case AMDGPU::AMDHSA_COV4:
-      HSAMetadataStream.reset(new HSAMD::MetadataStreamerMsgPackV4());
+      HSAMetadataStream = std::make_unique<HSAMD::MetadataStreamerMsgPackV4>();
       break;
     case AMDGPU::AMDHSA_COV5:
-      HSAMetadataStream.reset(new HSAMD::MetadataStreamerMsgPackV5());
+      HSAMetadataStream = std::make_unique<HSAMD::MetadataStreamerMsgPackV5>();
       break;
     case AMDGPU::AMDHSA_COV6:
-      HSAMetadataStream.reset(new HSAMD::MetadataStreamerMsgPackV6());
+      HSAMetadataStream = std::make_unique<HSAMD::MetadataStreamerMsgPackV6>();
       break;
     default:
       report_fatal_error("Unexpected code object version");

diff --git a/llvm/lib/Target/AMDGPU/AMDGPULibFunc.cpp b/llvm/lib/Target/AMDGPU/AMDGPULibFunc.cpp
@@ -1084,9 +1084,9 @@ bool UnmangledFuncInfo::lookup(StringRef Name, ID &Id) {
 
 AMDGPULibFunc::AMDGPULibFunc(const AMDGPULibFunc &F) {
   if (auto *MF = dyn_cast<AMDGPUMangledLibFunc>(F.Impl.get()))
-    Impl.reset(new AMDGPUMangledLibFunc(*MF));
+    Impl = std::make_unique<AMDGPUMangledLibFunc>(*MF);
   else if (auto *UMF = dyn_cast<AMDGPUUnmangledLibFunc>(F.Impl.get()))
-    Impl.reset(new AMDGPUUnmangledLibFunc(*UMF));
+    Impl = std::make_unique<AMDGPUUnmangledLibFunc>(*UMF);
   else
     Impl = std::unique_ptr<AMDGPULibFuncImpl>();
 }
@@ -1101,19 +1101,21 @@ AMDGPULibFunc &AMDGPULibFunc::operator=(const AMDGPULibFunc &F) {
 AMDGPULibFunc::AMDGPULibFunc(EFuncId Id, const AMDGPULibFunc &CopyFrom) {
   assert(AMDGPULibFuncBase::isMangled(Id) && CopyFrom.isMangled() &&
          "not supported");
-  Impl.reset(new AMDGPUMangledLibFunc(
-      Id, *cast<AMDGPUMangledLibFunc>(CopyFrom.Impl.get())));
+  Impl = std::make_unique<AMDGPUMangledLibFunc>(
+      Id, *cast<AMDGPUMangledLibFunc>(CopyFrom.Impl.get()));
 }
 
 AMDGPULibFunc::AMDGPULibFunc(EFuncId Id, FunctionType *FT, bool SignedInts) {
-  Impl.reset(new AMDGPUMangledLibFunc(Id, FT, SignedInts));
+  Impl = std::make_unique<AMDGPUMangledLibFunc>(Id, FT, SignedInts);
 }
 
 AMDGPULibFunc::AMDGPULibFunc(StringRef Name, FunctionType *FT) {
-  Impl.reset(new AMDGPUUnmangledLibFunc(Name, FT));
+  Impl = std::make_unique<AMDGPUUnmangledLibFunc>(Name, FT);
 }
 
-void AMDGPULibFunc::initMangled() { Impl.reset(new AMDGPUMangledLibFunc()); }
+void AMDGPULibFunc::initMangled() {
+  Impl = std::make_unique<AMDGPUMangledLibFunc>();
+}
 
 AMDGPULibFunc::Param *AMDGPULibFunc::getLeads() {
   if (!Impl)

diff --git a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
@@ -203,11 +203,13 @@ GCNSubtarget::GCNSubtarget(const Triple &TT, StringRef GPU, StringRef FS,
   // clang-format on
   MaxWavesPerEU = AMDGPU::IsaInfo::getMaxWavesPerEU(this);
   EUsPerCU = AMDGPU::IsaInfo::getEUsPerCU(this);
-  CallLoweringInfo.reset(new AMDGPUCallLowering(*getTargetLowering()));
-  InlineAsmLoweringInfo.reset(new InlineAsmLowering(getTargetLowering()));
-  Legalizer.reset(new AMDGPULegalizerInfo(*this, TM));
-  RegBankInfo.reset(new AMDGPURegisterBankInfo(*this));
-  InstSelector.reset(new AMDGPUInstructionSelector(*this, *RegBankInfo, TM));
+  CallLoweringInfo = std::make_unique<AMDGPUCallLowering>(*getTargetLowering());
+  InlineAsmLoweringInfo =
+      std::make_unique<InlineAsmLowering>(getTargetLowering());
+  Legalizer = std::make_unique<AMDGPULegalizerInfo>(*this, TM);
+  RegBankInfo = std::make_unique<AMDGPURegisterBankInfo>(*this);
+  InstSelector =
+      std::make_unique<AMDGPUInstructionSelector>(*this, *RegBankInfo, TM);
 }
 
 unsigned GCNSubtarget::getConstantBusLimit(unsigned Opcode) const {

diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -1089,7 +1089,7 @@ void SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
   // whole block for every handled copy.
   std::unique_ptr<RegScavenger> RS;
   if (Opcode == AMDGPU::INSTRUCTION_LIST_END)
-    RS.reset(new RegScavenger());
+    RS = std::make_unique<RegScavenger>();
 
   ArrayRef<int16_t> SubIndices = RI.getRegSplitParts(RC, EltSize);