ccu: add SMHC clock register and SMHC bus gating reset register #15
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Signed-off-by: DongQing <[email protected]>
luojia65
approved these changes
Oct 9, 2024
|
LGTM |
luojia65
reviewed
Oct 9, 2024
| PllAudio1, | ||
| /// PLL_PERI (2X). | ||
| /// Audio PLL (div 2). | ||
| PllAudio1Div2, |
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Add SMHC Clock register and SMHC Bus Gating Reset resgister, including the definition of regitster bitfiled and Read/Write functions in RCC peripheral refer to Section 3.2.6
CCU·Register Description.There are also some minor amends that the accord of register document, the
offset_ccutest case and the additions ofis_xxx_reset_clearedfunctions testcase in the case of xxx reset signal cleared by hardware.