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Simplified API
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romancardenas committed Oct 5, 2023
1 parent c03c7e3 commit 4d0c797
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Showing 5 changed files with 19 additions and 25 deletions.
21 changes: 10 additions & 11 deletions .github/workflows/ci.yml
Original file line number Diff line number Diff line change
Expand Up @@ -19,15 +19,8 @@ jobs:
- stable
- nightly
- 1.59.0
target:
- x86_64-unknown-linux-gnu
- riscv32i-unknown-none-elf
- riscv32imc-unknown-none-elf
- riscv32imac-unknown-none-elf
- riscv64gc-unknown-linux-gnu
- riscv64gc-unknown-none-elf
cargo_flags:
- "--features=clint-backend,unsafe-assume-single-core"
- "clint-backend"
include:
# Nightly is only for reference and allowed to fail
- rust: nightly
Expand All @@ -39,6 +32,12 @@ jobs:
- uses: dtolnay/rust-toolchain@master
with:
toolchain: ${{ matrix.toolchain }}
targets: ${{ matrix.target }}
- name: Build library
run: cargo build --target ${{ matrix.target }} ${{ matrix.cargo_flags }}
targets: riscv32i-unknown-none-elf,riscv32imc-unknown-none-elf,riscv32imac-unknown-none-elf,riscv64gc-unknown-none-elf
- name: Build riscv32i-unknown-none-elf
run: cargo build --target riscv32i-unknown-none-elf --features=${{ matrix.cargo_flags }},unsafe-assume-single-core
- name: Build riscv32imc-unknown-none-elf
run: cargo build --target riscv32imc-unknown-none-elf--features=${{ matrix.cargo_flags }},unsafe-assume-single-core
- name: Build riscv32imac-unknown-none-elf
run: cargo build --target riscv32imac-unknown-none-elf--features=${{ matrix.cargo_flags }}
- name: Build riscv64gc-unknown-none-elf
run: cargo build --target riscv64gc-unknown-none-elf--features=${{ matrix.cargo_flags }}
3 changes: 0 additions & 3 deletions riscv-slic-macros/src/api.rs
Original file line number Diff line number Diff line change
Expand Up @@ -34,7 +34,6 @@ pub fn api_mod() -> TokenStream {
#[inline]
#[no_mangle]
pub unsafe fn __slic_get_priority(interrupt: u16) -> u8 {
let interrupt: Interrupt = InterruptNumber::try_from(interrupt).unwrap();
__SLIC.get_priority(interrupt)
}

Expand All @@ -43,15 +42,13 @@ pub fn api_mod() -> TokenStream {
#[inline]
#[no_mangle]
pub unsafe fn __slic_set_priority(interrupt: u16, priority: u8) {
let interrupt: Interrupt = InterruptNumber::try_from(interrupt).unwrap();
__SLIC.set_priority(interrupt, priority);
}

/// Marks a software interrupt as pending.
#[inline]
#[no_mangle]
pub unsafe fn __slic_pend(interrupt: u16) {
let interrupt: Interrupt = InterruptNumber::try_from(interrupt).unwrap();
__SLIC.pend(interrupt);
if __SLIC.is_ready() {
export_swi_set();
Expand Down
2 changes: 1 addition & 1 deletion riscv-slic-macros/src/swi.rs
Original file line number Diff line number Diff line change
Expand Up @@ -42,7 +42,7 @@ pub fn swi_mod(input: &CodegenInput) -> TokenStream {
self as _
}

fn try_from(value: u16) -> Result<Self, u16> {
fn from_number(value: u16) -> Result<Self, u16> {
if value > Self::MAX_INTERRUPT_NUMBER {
Err(value)
} else {
Expand Down
2 changes: 1 addition & 1 deletion riscv-slic/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -34,5 +34,5 @@ pub unsafe trait InterruptNumber: Copy {

/// Tries to convert a number to a valid interrupt source.
/// If the conversion fails, it returns an error with the number back.
fn try_from(value: u16) -> Result<Self, u16>;
fn from_number(value: u16) -> Result<Self, u16>;
}
16 changes: 7 additions & 9 deletions riscv-slic/src/slic.rs
Original file line number Diff line number Diff line change
@@ -1,4 +1,3 @@
use crate::InterruptNumber;
use heapless::binary_heap::{BinaryHeap, Max};
use portable_atomic::{AtomicBool, AtomicU8, Ordering};

Expand Down Expand Up @@ -36,8 +35,8 @@ impl<const N: usize> SLIC<N> {

/// Returns the current priority of an interrupt source.
#[inline]
pub fn get_priority<I: InterruptNumber>(&self, interrupt: I) -> u8 {
self.priorities[interrupt.number() as usize]
pub fn get_priority(&self, interrupt: u16) -> u8 {
self.priorities[interrupt as usize]
}

/// Sets the priority of an interrupt source.
Expand All @@ -54,8 +53,8 @@ impl<const N: usize> SLIC<N> {
///
/// Changing the priority level of an interrupt may break priority-based critical sections.
#[inline]
pub unsafe fn set_priority<I: InterruptNumber>(&mut self, interrupt: I, priority: u8) {
self.priorities[interrupt.number() as usize] = priority;
pub unsafe fn set_priority(&mut self, interrupt: u16, priority: u8) {
self.priorities[interrupt as usize] = priority;
}

//// Returns current priority threshold.
Expand All @@ -76,8 +75,8 @@ impl<const N: usize> SLIC<N> {

/// Checks if a given interrupt is pending.
#[inline]
pub fn is_pending<I: InterruptNumber>(&mut self, interrupt: I) -> bool {
self.pending[interrupt.number() as usize].load(Ordering::Acquire)
pub fn is_pending(&mut self, interrupt: u16) -> bool {
self.pending[interrupt as usize].load(Ordering::Acquire)
}

/// Returns `true` if the next queued interrupt can be triggered.
Expand All @@ -95,8 +94,7 @@ impl<const N: usize> SLIC<N> {
///
/// If interrupt priority is 0 or already pending, this request is silently ignored.
#[inline]
pub fn pend<I: InterruptNumber>(&mut self, interrupt: I) {
let interrupt = interrupt.number();
pub fn pend(&mut self, interrupt: u16) {
let i = interrupt as usize;
if self.priorities[i] == 0 {
return;
Expand Down

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