Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

uplifting h8300 instructions to RzIL #4375

Draft
wants to merge 3 commits into
base: dev
Choose a base branch
from
Draft
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
116 changes: 116 additions & 0 deletions librz/arch/isa/h8300/h8300_disas.h
Original file line number Diff line number Diff line change
Expand Up @@ -128,6 +128,122 @@ struct h8300_cmd {
char operands[H8300_INSTR_MAXLEN];
};

// 8 addressing modes
typedef enum h8300_addr_mode_t {
H8300_REG_DIRECT,
H8300_REG_INDIRECT,
H8300_REG_INDIRECT_DISP, ///< register indirect with 16-bit displacement
H8300_REG_INDIRECT_I, ///< register indirect with post-increment
H8300_REG_INDIRECT_D, ///< register indirect with pre-decrement
H8300_ABS_8,
H8300_ABS_16,
H8300_IMM_3, ///< 3-bit immediate value
H8300_IMM_8, ///< 8-bit immediate value
H8300_IMM_16, ///< 16-bit immediate value
H8300_PC_RELATIVE_DISP, ///< PC-relative with 8-bit displacement
H8300_MEM_INDIRECT, ///< memory indirect
} H8300AddrMode;

typedef enum {
H8300_OP_NOP,
H8300_OP_SLEEP,
H8300_OP_STC,
H8300_OP_LDC,
H8300_OP_ORC,
H8300_OP_XORC,
H8300_OP_ANDC,
H8300_OP_LDC_2, //
H8300_OP_RTE,

H8300_OP_ADDB_DIRECT,
H8300_OP_ADDW_DIRECT,
H8300_OP_INC,
H8300_OP_ADDS,
H8300_OP_MOV_1,
H8300_OP_MOV_2,
H8300_OP_ADDX,
H8300_OP_DAA,
H8300_OP_SHL,
H8300_OP_SHR,
H8300_OP_ROTL,
H8300_OP_ROTR,
H8300_OP_OR,
H8300_OP_XOR,
H8300_OP_AND,
H8300_OP_NOT_NEG,
H8300_OP_SUB_1,
H8300_OP_SUBW,
H8300_OP_DEC,
H8300_OP_SUBS,
H8300_OP_CMP_1,
H8300_OP_CMP_2,
H8300_OP_SUBX,
H8300_OP_DAS,
H8300_OP_BRA,
H8300_OP_BRN,
H8300_OP_BHI,
H8300_OP_BLS,
H8300_OP_BCC,
H8300_OP_BCS,
H8300_OP_BNE,
H8300_OP_BEQ,
H8300_OP_BVC,
H8300_OP_BVS,
H8300_OP_BPL,
H8300_OP_BMI,
H8300_OP_BGE,
H8300_OP_BLT,
H8300_OP_BGT,
H8300_OP_BLE,
H8300_OP_MULXU,
H8300_OP_DIVXU,
H8300_OP_RTS,
H8300_OP_BSR,

H8300_OP_JMP_1,
H8300_OP_JMP_2,
H8300_OP_JMP_3,
H8300_OP_JSR_1,
H8300_OP_JSR_2,
H8300_OP_JSR_3,
H8300_OP_BSET_1,
H8300_OP_BNOT_1,
H8300_OP_BCLR_R2R8,
H8300_OP_BTST_R2R8,
H8300_OP_BST_BIST,
H8300_OP_MOV_R82IND16,
H8300_OP_MOV_IND162R16,
H8300_OP_MOV_R82ABS16,
H8300_OP_MOV_ABS162R16,
H8300_OP_MOV_R82RDEC16,
H8300_OP_MOV_INDINC162R16,
H8300_OP_MOV_R82DISPR16,
H8300_OP_MOV_DISP162R16,
H8300_OP_BSET_2,
H8300_OP_BNOT_2,
H8300_OP_BCLR_IMM2R8,
H8300_OP_BTST,
H8300_OP_BOR_BIOR,
H8300_OP_BXOR_BIXOR,
H8300_OP_BAND_BIAND,
H8300_OP_BILD_IMM2R8,
H8300_OP_MOV_IMM162R16,
H8300_OP_EEPMOV,
H8300_OP_BIAND_IMM2IND16,
H8300_OP_BCLR_R2IND16,
H8300_OP_BIAND_IMM2ABS8,
H8300_OP_BCLR_R2ABS8,

H8300_OP_SIZE
} H8300OpMnem;

typedef struct h8300_opcode_t {
ut16 opcode;
const char *str_mnem;
H8300OpMnem mnemonic;
ut16 param[2];
} H8300Op;

int h8300_decode_command(const ut8 *instr, struct h8300_cmd *cmd);

#endif /* H8300_DISAS_H */
Loading
Loading