PIC IL: pic18 registers

rizinorg · Apr 16, 2024 · 2d21f83 · 2d21f83
1 parent 80e8538
commit 2d21f83
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Showing 2 changed files with 110 additions and 8 deletions.
diff --git a/librz/arch/isa/pic/pic18_analysis.inc b/librz/arch/isa/pic/pic18_analysis.inc
@@ -344,7 +344,8 @@ static char *analysis_pic_pic18_get_reg_profile(RzAnalysis *esil) {
 		"gpr	adcon0	.8	95	0\n"
 		"#stkprt max is 0b11111\n"
 		"gpr	stkptr	.8	96	0\n"
-		"gpr	tablat	.8	14	0\n";
-
+		"gpr	tblat	.8	14	0\n"
+		"gpr	_sram	.8	98	0\n"
+		"gpr	_stack	.8	99	0\n";
 	return strdup(p);
 }
diff --git a/librz/arch/isa/pic/pic18_il.inc b/librz/arch/isa/pic/pic18_il.inc
@@ -129,8 +129,8 @@ static RzILOpEffect *set_prod16(RzILOpPure *res) {
 
 static RzILOpEffect *op_pop() {
 	return SEQ2(
-		SETG("_stack_ptr", SUB(VARG("_stack_ptr"), U16(4))),
-		SETG("tos", LOADW(32, ADD(VARG("_stack"), VARG("_stack_ptr")))));
+		SETG("stkptr", SUB(VARG("stkptr"), U16(4))),
+		SETG("tos", LOADW(32, ADD(VARG("_stack"), VARG("stkptr")))));
 }
 
 static RzILOpEffect *op_pop_jmp() {
@@ -142,8 +142,8 @@ static RzILOpEffect *op_pop_jmp() {
 
 static RzILOpEffect *op_push(RzILOpPure *x) {
 	return SEQ3(
-		SETG("_stack_ptr", ADD(VARG("_stack_ptr"), U16(4))),
-		STOREW(ADD(VARG("_stack"), VARG("_stack_ptr")), x),
+		SETG("stkptr", ADD(VARG("stkptr"), U16(4))),
+		STOREW(ADD(VARG("_stack"), VARG("stkptr")), x),
 		SETG("tos", DUP(x)));
 }
 
@@ -368,9 +368,110 @@ static RzILOpEffect *pic18_il(Pic18Op *op) {
 #undef VPC
 
 static const char *pic18_regnames[] = {
+	"pcl",
+	"pclath",
+	"pclatu",
+	"bsr",
+	"tos",
+	"tosl",
+	"tosh",
+	"tosu",
+	"indf0",
+	"fsr0",
+	"fsr0l",
+	"fsr0h",
+	"indf1",
+	"fsr1",
+	"fsr1l",
+	"fsr1h",
+	"indf2",
+	"fsr2",
+	"frs2l",
+	"fsr2h",
+	"tblptr",
+	"tblptrl",
+	"tblptrh",
+	"tblptru",
+	"rcon",
+	"memcon",
+	"intcon",
+	"intcon2",
+	"intcon3",
+	"pie1",
+	"porta",
+	"trisa",
+	"portb",
+	"tisb",
+	"latb",
+	"portc",
+	"trisc",
+	"latc",
+	"portd",
+	"trisd",
+	"latd",
+	"pspcon",
+	"porte",
+	"trise",
+	"late",
+	"t0con",
+	"t1con",
+	"t2con",
+	"tmr1h",
+	"tmr0h",
+	"tmr1l",
+	"tmr2",
+	"pr2",
+	"ccpr1h",
+	"postinc2",
+	"ccpr1l",
+	"postdec2",
+	"ccp1con",
+	"preinc2",
+	"ccpr2h",
+	"plusw2",
+	"ccpr2l",
+	"ccp2con",
+	"status",
+	"c	.",
+	"dc	.",
+	"z	.",
+	"ov	.",
+	"n	.",
+	"prod",
+	"prodl",
+	"prodh",
+	"osccon",
+	"tmr3h",
+	"lvdcon",
+	"tmr3l",
+	"wdtcon",
+	"t3con",
+	"spbrg",
+	"postinc0",
+	"rcreg",
+	"postdec0",
+	"txreg",
+	"preinc0",
+	"txsta",
+	"plusw0",
+	"rcsta",
+	"sspbuf",
+	"wreg",
+	"sspadd",
+	"sspstat",
+	"postinc1",
+	"sspcon1",
+	"postdec1",
+	"sspcon2",
+	"preinc1",
+	"adresh",
+	"plusw1",
+	"adresl",
+	"adcon0",
+	"stkptr",
+	"tblat",
 	"_sram",
-	"_stack",
-	"_stack_ptr",
+	"_stack"
 };
 
 static RzAnalysisILConfig *pic18_il_config(