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Documentation Updates: reorder README and combine with STATUS.md #602

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merged 1 commit into from
Oct 30, 2024

Reorder README and combine with STATUS

efc5201
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Merged

Documentation Updates: reorder README and combine with STATUS.md #602

Reorder README and combine with STATUS
efc5201
Select commit
Loading
Failed to load commit list.
GitHub Actions / Test Results succeeded Oct 28, 2024 in 0s

All 396 tests pass in 0s

396 tests  ±0   396 ✅ ±0   0s ⏱️ ±0s
  4 suites ±0     0 💤 ±0 
  1 files   ±0     0 ❌ ±0 

Results for commit efc5201. ± Comparison against earlier commit 025565c.

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See this annotation in the file changed.

@github-actions github-actions / Test Results

396 tests found

There are 396 tests, see "Raw output" for the full list of tests.
Raw output
Building 32-bit RISCV C emulator
Building 32-bit RISCV RVFI C emulator
Building 64-bit RISCV C emulator
Building 64-bit RISCV RVFI C emulator
C-32 rv32mi-p-breakpoint.elf
C-32 rv32mi-p-csr.elf
C-32 rv32mi-p-illegal.elf
C-32 rv32mi-p-ma_addr.elf
C-32 rv32mi-p-ma_fetch.elf
C-32 rv32mi-p-mcsr.elf
C-32 rv32mi-p-sbreak.elf
C-32 rv32mi-p-scall.elf
C-32 rv32mi-p-shamt.elf
C-32 rv32si-p-csr.elf
C-32 rv32si-p-dirty.elf
C-32 rv32si-p-ma_fetch.elf
C-32 rv32si-p-sbreak.elf
C-32 rv32si-p-scall.elf
C-32 rv32si-p-wfi.elf
C-32 rv32ua-p-amoadd_w.elf
C-32 rv32ua-p-amoand_w.elf
C-32 rv32ua-p-amomax_w.elf
C-32 rv32ua-p-amomaxu_w.elf
C-32 rv32ua-p-amomin_w.elf
C-32 rv32ua-p-amominu_w.elf
C-32 rv32ua-p-amoor_w.elf
C-32 rv32ua-p-amoswap_w.elf
C-32 rv32ua-p-amoxor_w.elf
C-32 rv32ua-p-lrsc.elf
C-32 rv32ua-v-amoadd_w.elf
C-32 rv32ua-v-amoand_w.elf
C-32 rv32ua-v-amomax_w.elf
C-32 rv32ua-v-amomaxu_w.elf
C-32 rv32ua-v-amomin_w.elf
C-32 rv32ua-v-amominu_w.elf
C-32 rv32ua-v-amoor_w.elf
C-32 rv32ua-v-amoswap_w.elf
C-32 rv32ua-v-amoxor_w.elf
C-32 rv32ua-v-lrsc.elf
C-32 rv32uc-p-rvc.elf
C-32 rv32uc-v-rvc.elf
C-32 rv32ud-p-fadd.elf
C-32 rv32ud-p-fclass.elf
C-32 rv32ud-p-fcmp.elf
C-32 rv32ud-p-fcvt.elf
C-32 rv32ud-p-fcvt_w.elf
C-32 rv32ud-p-fdiv.elf
C-32 rv32ud-p-fmadd.elf
C-32 rv32ud-p-fmin.elf
C-32 rv32ud-v-fadd.elf
C-32 rv32ud-v-fclass.elf
C-32 rv32ud-v-fcmp.elf
C-32 rv32ud-v-fcvt.elf
C-32 rv32ud-v-fcvt_w.elf
C-32 rv32ud-v-fdiv.elf
C-32 rv32ud-v-fmadd.elf
C-32 rv32ud-v-fmin.elf
C-32 rv32uf-p-fadd.elf
C-32 rv32uf-p-fclass.elf
C-32 rv32uf-p-fcmp.elf
C-32 rv32uf-p-fcvt.elf
C-32 rv32uf-p-fcvt_w.elf
C-32 rv32uf-p-fdiv.elf
C-32 rv32uf-p-fmadd.elf
C-32 rv32uf-p-fmin.elf
C-32 rv32uf-v-fadd.elf
C-32 rv32uf-v-fclass.elf
C-32 rv32uf-v-fcmp.elf
C-32 rv32uf-v-fcvt.elf
C-32 rv32uf-v-fcvt_w.elf
C-32 rv32uf-v-fdiv.elf
C-32 rv32uf-v-fmadd.elf
C-32 rv32uf-v-fmin.elf
C-32 rv32ui-p-add.elf
C-32 rv32ui-p-addi.elf
C-32 rv32ui-p-and.elf
C-32 rv32ui-p-andi.elf
C-32 rv32ui-p-auipc.elf
C-32 rv32ui-p-beq.elf
C-32 rv32ui-p-bge.elf
C-32 rv32ui-p-bgeu.elf
C-32 rv32ui-p-blt.elf
C-32 rv32ui-p-bltu.elf
C-32 rv32ui-p-bne.elf
C-32 rv32ui-p-fence_i.elf
C-32 rv32ui-p-jal.elf
C-32 rv32ui-p-jalr.elf
C-32 rv32ui-p-lb.elf
C-32 rv32ui-p-lbu.elf
C-32 rv32ui-p-lh.elf
C-32 rv32ui-p-lhu.elf
C-32 rv32ui-p-lui.elf
C-32 rv32ui-p-lw.elf
C-32 rv32ui-p-or.elf
C-32 rv32ui-p-ori.elf
C-32 rv32ui-p-sb.elf
C-32 rv32ui-p-sh.elf
C-32 rv32ui-p-simple.elf
C-32 rv32ui-p-sll.elf
C-32 rv32ui-p-slli.elf
C-32 rv32ui-p-slt.elf
C-32 rv32ui-p-slti.elf
C-32 rv32ui-p-sltiu.elf
C-32 rv32ui-p-sltu.elf
C-32 rv32ui-p-sra.elf
C-32 rv32ui-p-srai.elf
C-32 rv32ui-p-srl.elf
C-32 rv32ui-p-srli.elf
C-32 rv32ui-p-sub.elf
C-32 rv32ui-p-sw.elf
C-32 rv32ui-p-xor.elf
C-32 rv32ui-p-xori.elf
C-32 rv32ui-v-add.elf
C-32 rv32ui-v-addi.elf
C-32 rv32ui-v-and.elf
C-32 rv32ui-v-andi.elf
C-32 rv32ui-v-auipc.elf
C-32 rv32ui-v-beq.elf
C-32 rv32ui-v-bge.elf
C-32 rv32ui-v-bgeu.elf
C-32 rv32ui-v-blt.elf
C-32 rv32ui-v-bltu.elf
C-32 rv32ui-v-bne.elf
C-32 rv32ui-v-fence_i.elf
C-32 rv32ui-v-jal.elf
C-32 rv32ui-v-jalr.elf
C-32 rv32ui-v-lb.elf
C-32 rv32ui-v-lbu.elf
C-32 rv32ui-v-lh.elf
C-32 rv32ui-v-lhu.elf
C-32 rv32ui-v-lui.elf
C-32 rv32ui-v-lw.elf
C-32 rv32ui-v-or.elf
C-32 rv32ui-v-ori.elf
C-32 rv32ui-v-sb.elf
C-32 rv32ui-v-sh.elf
C-32 rv32ui-v-simple.elf
C-32 rv32ui-v-sll.elf
C-32 rv32ui-v-slli.elf
C-32 rv32ui-v-slt.elf
C-32 rv32ui-v-slti.elf
C-32 rv32ui-v-sltiu.elf
C-32 rv32ui-v-sltu.elf
C-32 rv32ui-v-sra.elf
C-32 rv32ui-v-srai.elf
C-32 rv32ui-v-srl.elf
C-32 rv32ui-v-srli.elf
C-32 rv32ui-v-sub.elf
C-32 rv32ui-v-sw.elf
C-32 rv32ui-v-xor.elf
C-32 rv32ui-v-xori.elf
C-32 rv32um-p-div.elf
C-32 rv32um-p-divu.elf
C-32 rv32um-p-mul.elf
C-32 rv32um-p-mulh.elf
C-32 rv32um-p-mulhsu.elf
C-32 rv32um-p-mulhu.elf
C-32 rv32um-p-rem.elf
C-32 rv32um-p-remu.elf
C-32 rv32um-v-div.elf
C-32 rv32um-v-divu.elf
C-32 rv32um-v-mul.elf
C-32 rv32um-v-mulh.elf
C-32 rv32um-v-mulhsu.elf
C-32 rv32um-v-mulhu.elf
C-32 rv32um-v-rem.elf
C-32 rv32um-v-remu.elf
C-64 rv64mi-p-access.elf
C-64 rv64mi-p-breakpoint.elf
C-64 rv64mi-p-csr.elf
C-64 rv64mi-p-illegal.elf
C-64 rv64mi-p-ma_addr.elf
C-64 rv64mi-p-ma_fetch.elf
C-64 rv64mi-p-mcsr.elf
C-64 rv64mi-p-sbreak.elf
C-64 rv64mi-p-scall.elf
C-64 rv64si-p-csr.elf
C-64 rv64si-p-dirty.elf
C-64 rv64si-p-ma_fetch.elf
C-64 rv64si-p-sbreak.elf
C-64 rv64si-p-scall.elf
C-64 rv64si-p-wfi.elf
C-64 rv64ua-p-amoadd_d.elf
C-64 rv64ua-p-amoadd_w.elf
C-64 rv64ua-p-amoand_d.elf
C-64 rv64ua-p-amoand_w.elf
C-64 rv64ua-p-amomax_d.elf
C-64 rv64ua-p-amomax_w.elf
C-64 rv64ua-p-amomaxu_d.elf
C-64 rv64ua-p-amomaxu_w.elf
C-64 rv64ua-p-amomin_d.elf
C-64 rv64ua-p-amomin_w.elf
C-64 rv64ua-p-amominu_d.elf
C-64 rv64ua-p-amominu_w.elf
C-64 rv64ua-p-amoor_d.elf
C-64 rv64ua-p-amoor_w.elf
C-64 rv64ua-p-amoswap_d.elf
C-64 rv64ua-p-amoswap_w.elf
C-64 rv64ua-p-amoxor_d.elf
C-64 rv64ua-p-amoxor_w.elf
C-64 rv64ua-p-lrsc.elf
C-64 rv64ua-v-amoadd_d.elf
C-64 rv64ua-v-amoadd_w.elf
C-64 rv64ua-v-amoand_d.elf
C-64 rv64ua-v-amoand_w.elf
C-64 rv64ua-v-amomax_d.elf
C-64 rv64ua-v-amomax_w.elf
C-64 rv64ua-v-amomaxu_d.elf
C-64 rv64ua-v-amomaxu_w.elf
C-64 rv64ua-v-amomin_d.elf
C-64 rv64ua-v-amomin_w.elf
C-64 rv64ua-v-amominu_d.elf
C-64 rv64ua-v-amominu_w.elf
C-64 rv64ua-v-amoor_d.elf
C-64 rv64ua-v-amoor_w.elf
C-64 rv64ua-v-amoswap_d.elf
C-64 rv64ua-v-amoswap_w.elf
C-64 rv64ua-v-amoxor_d.elf
C-64 rv64ua-v-amoxor_w.elf
C-64 rv64ua-v-lrsc.elf
C-64 rv64uc-p-rvc.elf
C-64 rv64uc-v-rvc.elf
C-64 rv64ud-p-fadd.elf
C-64 rv64ud-p-fclass.elf
C-64 rv64ud-p-fcmp.elf
C-64 rv64ud-p-fcvt.elf
C-64 rv64ud-p-fcvt_w.elf
C-64 rv64ud-p-fdiv.elf
C-64 rv64ud-p-fmadd.elf
C-64 rv64ud-p-fmin.elf
C-64 rv64ud-p-ldst.elf
C-64 rv64ud-p-move.elf
C-64 rv64ud-p-recoding.elf
C-64 rv64ud-p-structural.elf
C-64 rv64ud-v-fadd.elf
C-64 rv64ud-v-fclass.elf
C-64 rv64ud-v-fcmp.elf
C-64 rv64ud-v-fcvt.elf
C-64 rv64ud-v-fcvt_w.elf
C-64 rv64ud-v-fdiv.elf
C-64 rv64ud-v-fmadd.elf
C-64 rv64ud-v-fmin.elf
C-64 rv64ud-v-ldst.elf
C-64 rv64ud-v-move.elf
C-64 rv64ud-v-recoding.elf
C-64 rv64ud-v-structural.elf
C-64 rv64uf-p-fadd.elf
C-64 rv64uf-p-fclass.elf
C-64 rv64uf-p-fcmp.elf
C-64 rv64uf-p-fcvt.elf
C-64 rv64uf-p-fcvt_w.elf
C-64 rv64uf-p-fdiv.elf
C-64 rv64uf-p-fmadd.elf
C-64 rv64uf-p-fmin.elf
C-64 rv64uf-p-ldst.elf
C-64 rv64uf-p-move.elf
C-64 rv64uf-p-recoding.elf
C-64 rv64uf-v-fadd.elf
C-64 rv64uf-v-fclass.elf
C-64 rv64uf-v-fcmp.elf
C-64 rv64uf-v-fcvt.elf
C-64 rv64uf-v-fcvt_w.elf
C-64 rv64uf-v-fdiv.elf
C-64 rv64uf-v-fmadd.elf
C-64 rv64uf-v-fmin.elf
C-64 rv64uf-v-ldst.elf
C-64 rv64uf-v-move.elf
C-64 rv64uf-v-recoding.elf
C-64 rv64ui-p-add.elf
C-64 rv64ui-p-addi.elf
C-64 rv64ui-p-addiw.elf
C-64 rv64ui-p-addw.elf
C-64 rv64ui-p-and.elf
C-64 rv64ui-p-andi.elf
C-64 rv64ui-p-auipc.elf
C-64 rv64ui-p-beq.elf
C-64 rv64ui-p-bge.elf
C-64 rv64ui-p-bgeu.elf
C-64 rv64ui-p-blt.elf
C-64 rv64ui-p-bltu.elf
C-64 rv64ui-p-bne.elf
C-64 rv64ui-p-fence_i.elf
C-64 rv64ui-p-jal.elf
C-64 rv64ui-p-jalr.elf
C-64 rv64ui-p-lb.elf
C-64 rv64ui-p-lbu.elf
C-64 rv64ui-p-ld.elf
C-64 rv64ui-p-lh.elf
C-64 rv64ui-p-lhu.elf
C-64 rv64ui-p-lui.elf
C-64 rv64ui-p-lw.elf
C-64 rv64ui-p-lwu.elf
C-64 rv64ui-p-or.elf
C-64 rv64ui-p-ori.elf
C-64 rv64ui-p-sb.elf
C-64 rv64ui-p-sd.elf
C-64 rv64ui-p-sh.elf
C-64 rv64ui-p-simple.elf
C-64 rv64ui-p-sll.elf
C-64 rv64ui-p-slli.elf
C-64 rv64ui-p-slliw.elf
C-64 rv64ui-p-sllw.elf
C-64 rv64ui-p-slt.elf
C-64 rv64ui-p-slti.elf
C-64 rv64ui-p-sltiu.elf
C-64 rv64ui-p-sltu.elf
C-64 rv64ui-p-sra.elf
C-64 rv64ui-p-srai.elf
C-64 rv64ui-p-sraiw.elf
C-64 rv64ui-p-sraw.elf
C-64 rv64ui-p-srl.elf
C-64 rv64ui-p-srli.elf
C-64 rv64ui-p-srliw.elf
C-64 rv64ui-p-srlw.elf
C-64 rv64ui-p-sub.elf
C-64 rv64ui-p-subw.elf
C-64 rv64ui-p-sw.elf
C-64 rv64ui-p-xor.elf
C-64 rv64ui-p-xori.elf
C-64 rv64ui-v-add.elf
C-64 rv64ui-v-addi.elf
C-64 rv64ui-v-addiw.elf
C-64 rv64ui-v-addw.elf
C-64 rv64ui-v-and.elf
C-64 rv64ui-v-andi.elf
C-64 rv64ui-v-auipc.elf
C-64 rv64ui-v-beq.elf
C-64 rv64ui-v-bge.elf
C-64 rv64ui-v-bgeu.elf
C-64 rv64ui-v-blt.elf
C-64 rv64ui-v-bltu.elf
C-64 rv64ui-v-bne.elf
C-64 rv64ui-v-fence_i.elf
C-64 rv64ui-v-jal.elf
C-64 rv64ui-v-jalr.elf
C-64 rv64ui-v-lb.elf
C-64 rv64ui-v-lbu.elf
C-64 rv64ui-v-ld.elf
C-64 rv64ui-v-lh.elf
C-64 rv64ui-v-lhu.elf
C-64 rv64ui-v-lui.elf
C-64 rv64ui-v-lw.elf
C-64 rv64ui-v-lwu.elf
C-64 rv64ui-v-or.elf
C-64 rv64ui-v-ori.elf
C-64 rv64ui-v-sb.elf
C-64 rv64ui-v-sd.elf
C-64 rv64ui-v-sh.elf
C-64 rv64ui-v-simple.elf
C-64 rv64ui-v-sll.elf
C-64 rv64ui-v-slli.elf
C-64 rv64ui-v-slliw.elf
C-64 rv64ui-v-sllw.elf
C-64 rv64ui-v-slt.elf
C-64 rv64ui-v-slti.elf
C-64 rv64ui-v-sltiu.elf
C-64 rv64ui-v-sltu.elf
C-64 rv64ui-v-sra.elf
C-64 rv64ui-v-srai.elf
C-64 rv64ui-v-sraiw.elf
C-64 rv64ui-v-sraw.elf
C-64 rv64ui-v-srl.elf
C-64 rv64ui-v-srli.elf
C-64 rv64ui-v-srliw.elf
C-64 rv64ui-v-srlw.elf
C-64 rv64ui-v-sub.elf
C-64 rv64ui-v-subw.elf
C-64 rv64ui-v-sw.elf
C-64 rv64ui-v-xor.elf
C-64 rv64ui-v-xori.elf
C-64 rv64um-p-div.elf
C-64 rv64um-p-divu.elf
C-64 rv64um-p-divuw.elf
C-64 rv64um-p-divw.elf
C-64 rv64um-p-mul.elf
C-64 rv64um-p-mulh.elf
C-64 rv64um-p-mulhsu.elf
C-64 rv64um-p-mulhu.elf
C-64 rv64um-p-mulw.elf
C-64 rv64um-p-rem.elf
C-64 rv64um-p-remu.elf
C-64 rv64um-p-remuw.elf
C-64 rv64um-p-remw.elf
C-64 rv64um-v-div.elf
C-64 rv64um-v-divu.elf
C-64 rv64um-v-divuw.elf
C-64 rv64um-v-divw.elf
C-64 rv64um-v-mul.elf
C-64 rv64um-v-mulh.elf
C-64 rv64um-v-mulhsu.elf
C-64 rv64um-v-mulhu.elf
C-64 rv64um-v-mulw.elf
C-64 rv64um-v-rem.elf
C-64 rv64um-v-remu.elf
C-64 rv64um-v-remuw.elf
C-64 rv64um-v-remw.elf