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Add RV32 restriction for compressed shift instructions #440

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Timmmm
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@Timmmm Timmmm commented Mar 19, 2024

The restriction was present for C.SLLI but was missing for C.SRLI and C.SRAI.

The format is copied from C.SLLI.

Fixes #356

The restriction was present for `C.SLLI` but was missing for `C.SRLI` and `C.SRAI`.

The format is copied from `C.SLLI`.

Fixes riscv#356
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Test Results

712 tests  ±0   712 ✅ ±0   0s ⏱️ ±0s
  6 suites ±0     0 💤 ±0 
  1 files   ±0     0 ❌ ±0 

Results for commit d6ff4ee. ± Comparison against base commit c287c34.

@billmcspadden-riscv billmcspadden-riscv merged commit fd21acc into riscv:master Mar 25, 2024
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@Timmmm Timmmm deleted the user/timh/rv32_compressed_shift branch April 4, 2024 11:40
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C.SRAI and C.SRLI are missing RV32 decoding restrictions
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