fix the typos

benchmarks/Makefile

@@ -16,8 +16,7 @@ CONFIG     ?=rv64-zscrypto
 
 include common.mk
 
-#
-# Make sure the header files are coppied over.
+# Make sure the header files are copied over.
 $(foreach HEADER,$(HEADERS_IN),$(eval $(call add_header_target,$(HEADER))))
 
 headers: $(HEADERS_OUT)

benchmarks/aes/zscrypto_rv32/aes_common.S

@@ -3,7 +3,7 @@
 #define __AES_COMMON_S__
 
 //
-// Rotate value in RS1 right by IMM. Use TMP as scratch regiser.
+// Rotate value in RS1 right by IMM. Use TMP as scratch register.
 // RD may equal RS1. TMP may not equal RD or RS1.
 .macro ROR32I RD, TMP, RS1, IMM
     srli    \TMP, \RS1, \IMM

benchmarks/permutation/permutation.c

@@ -78,7 +78,7 @@ uint64_t sbox_4bit(uint64_t sbox, uint64_t in) {
                       xperm4(sbox_h, in_l ^ msk);
     uint64_t rd     = (((uint64_t)rd_h) << 32)    |  // Return values in
                       rd_l;                          // a0, a1
-    return   rd     ;                                // +1 instruciton
+    return   rd     ;                                // +1 instruction
     // 9 instructions for entire function.
 }
 

bin/better_parse_opcodes.py

@@ -100,7 +100,7 @@ def hex(self):
 
 class Instruction(object):
     """
-    Describes a single instruciton in terms of its operands and fields.
+    Describes a single instruction in terms of its operands and fields.
     """
 
     def __init__(self, mnemonic, operands, encoding_fields, constraints):
@@ -191,7 +191,7 @@ def wavedrom(self):
 
 class EncodingParser(object):
     """
-    Responsible for parseing the instruction opcode definition files.
+    Responsible for parsing the instruction opcode definition files.
     """
 
     known_operands = {
@@ -332,7 +332,7 @@ def cmd_check_encodings(instrs):
     Check if any of the encodings collide.
     Returns true if the checks pass, False otherwise.
     """
-    print("Instrucitons parsed: %d" % len(instrs))
+    print("Instructions parsed: %d" % len(instrs))
     collisions = []
 
     checked = set([])
@@ -466,8 +466,8 @@ def cmd_binutils(instrs):
 
 def make_sail_encdec_pattern(i):
     """
-    Returns a list of strings, represnting the SAIL encdec clause
-    pattern which will decode to the supplied instruciton.
+    Returns a list of strings, representing the SAIL encdec clause
+    pattern which will decode to the supplied instruction.
     """
     tp = []
     for f in i.fields:
@@ -567,7 +567,7 @@ def build_arg_parser():
     sub_textable.set_defaults(func=cmd_tex_table)
     sub_textable.add_argument("input_files",nargs="+",type=argparse.FileType("r"))
 
-    sub_texcmds = subs.add_parser("tex-cmds",help="Print the latex for the encoding table row of each instruciton, wrapped up as a single command.")
+    sub_texcmds = subs.add_parser("tex-cmds",help="Print the latex for the encoding table row of each instruction, wrapped up as a single command.")
     sub_texcmds.set_defaults(func=cmd_tex_cmds)
     sub_texcmds.add_argument("input_files",nargs="+",type=argparse.FileType("r"))
 

doc/README.md

@@ -10,7 +10,7 @@ This directory contains the official draft specification, in
 The specification is split into two components: Scalar+Entropy Source and
 Vector.
 
-To install the relevent tools for building a PDF document from the
+To install the relevant tools for building a PDF document from the
 AsciiDoc source, follow the instructions 
 [here](https://github.com/riscv/docs-templates)
 

doc/old-tex/tex/sec-audience.tex

@@ -12,7 +12,7 @@
 here, with a brief explanation of what we expect them to know, and how
 it relates to the specification.
 We hope this aids people's understanding of which aspects of the specificaiton
-are particularly relevent to them, which they may (safely!) ignore, and
+are particularly relevant to them, which they may (safely!) ignore, and
 pass to a colleague.
 
 \begin{itemize}

doc/scalar/riscv-crypto-scalar-appx-entropy-source.adoc

@@ -827,7 +827,7 @@ mechanism.
 The behavior of other input and output bits is largely left to the vendor
 (as they depend on the technical details of the physical entropy source),
 as is the address of the custom `mnoise` CSR. Other contents and behavior of the
-CSR only can be intepreted in the context of `mvendorid`, `marchid`, and
+CSR only can be interpreted in the context of `mvendorid`, `marchid`, and
 `mimpid` CSR identifiers.
 
 When not implemented (e.g., in virtual machines), `mnoise` can permanently

rtl/crypto-fu/riscv_crypto_fu_saes32_ssm4.v

@@ -75,7 +75,7 @@ assign in_bytes[1]  = rs2[15: 8];
 assign in_bytes[2]  = rs2[23:16];
 assign in_bytes[3]  = rs2[31:24];
 
-// SBox inverse only relevent for AES. SM4 has only forward SBox.
+// SBox inverse only relevant for AES. SM4 has only forward SBox.
 wire        sbox_dec= SAES_DEC_EN ? op_saes32_decs || op_saes32_decsm   :
                                     1'b0                                ;
 

sail/README.md

@@ -5,7 +5,7 @@
 
 ---
 
-# Relevent Github issues:
+# Relevant Github issues:
 
 A dynamically updated list can be found 
 [here](https://github.com/riscv/riscv-crypto/issues?q=is%3Aissue+is%3Aopen+label%3ASAIL).

sail/riscv_crypto_tests.sail

@@ -60,7 +60,7 @@ function crypto_test_vaes_256_keystep_fwd () = {
 
 
 /* 
- * Make sure we can calulate the correct final round key for AES 128
+ * Make sure we can calculate the correct final round key for AES 128
  */
 val      crypto_test_vaes_128_get_final_round_key : unit -> bool effect{escape}
 function crypto_test_vaes_128_get_final_round_key() = {
@@ -71,7 +71,7 @@ function crypto_test_vaes_128_get_final_round_key() = {
 }
 
 /* 
- * Make sure we can calulate the correct final round key for AES 256
+ * Make sure we can calculate the correct final round key for AES 256
  */
 val      crypto_test_vaes_256_get_final_round_key : unit -> bool effect{escape}
 function crypto_test_vaes_256_get_final_round_key() = {

sail/riscv_insts_crypto_rvv_sha.sail

@@ -363,7 +363,7 @@ function sha512_16_rounds   (ws       , ms       , rnd) = {
  * ------------------------------------------------------------
  */
 
-/* TOOD: VSHA2_WS raise invalid opcode if SEW=256 and rnd >= 64 */
+/* TODO: VSHA2_WS raise invalid opcode if SEW=256 and rnd >= 64 */
 function clause execute (       VSHA2_WS (vt,rnd,vs2)) = {
     let r : int = 0;
     if(vGetSEW() == 256) then {

sail/setup-sail.sh

@@ -20,7 +20,7 @@ sudo apt-get install build-essential git m4 libgmp-dev z3 opam
 opam init
 
 #
-# Get the corect versions of OCaml
+# Get the correct versions of OCaml
 opam switch create ocaml-base-compiler.4.06.1
 eval $(opam env)
 

tests/compliance/test-plan-scalar.adoc

@@ -397,7 +397,7 @@ two _pseudo-instructions_ to access them:
    This is the only architecturally defined bit.
 
 ** Tests must determine if `mnoise` is implemented first, before
-   checking any other behaviour, and accomodate this case in the
+   checking any other behaviour, and accommodate this case in the
    test signature.
 
 * Accesses to `mnoise` in any privilege mode other than machine mode
@@ -408,7 +408,7 @@ have different behaviour after post-silicon-validation. This is because
 it is designed as a validation / certification interface to check that
 the noise source is functioning correctly.
 Once the noise source is validated, the interface _may be disabled
-permenantly_. Tests must account for this in their signature generation.
+permanently_. Tests must account for this in their signature generation.
 
 === CSR `mentropy`
 

tools/gcc-patch-tasks.adoc

@@ -129,6 +129,6 @@ We do not expect the compiler to use the complex algorithm specific
 instructions.
 
 NOTE: It _might_ be possible to write a matching pattern for the
-SHA2 and SM3 instructions, but this is not necessary for inital
+SHA2 and SM3 instructions, but this is not necessary for initial
 support.