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typos and minor fixes #409

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typos and minor fixes #409

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20039b4
typo
tariqkurd-repo Oct 4, 2024
4d1524e
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tariqkurd-repo Oct 4, 2024
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2 changes: 1 addition & 1 deletion src/insns/modesw_32bit.adoc
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Expand Up @@ -24,7 +24,7 @@ Set the hart's current CHERI execution mode in <<pcc>>.
* MODESW.INT: If the current mode in <<pcc>> is {cheri_cap_mode_name} ({CAP_MODE_VALUE}), then the <<m_bit>> in <<pcc>> is set to {cheri_int_mode_name} ({INT_MODE_VALUE}). Otherwise no effect.

NOTE: Implementations may optionally support executing <<MODESW_CAP>> and <<MODESW_INT>> from the
program buffer while in debug mode. If supported them the <<m_bit>> in
program buffer while in debug mode. If supported then the <<m_bit>> in
<<dinfc>> is set accordingly and used to control which mode to enter next time debug
mode is entered. The CHERI execution mode is only controlled by the <<m_bit>>
of <<dinfc>> in debug mode.
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2 changes: 1 addition & 1 deletion src/tid-ext.adoc
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Expand Up @@ -7,7 +7,7 @@ software compartmentalization of CHERI programs.

=== Control and Status Registers (CSRs)

{tid_ext_name} adds two new CSRs to implement a trusted thread
{tid_ext_name} adds new CSRs to implement a trusted thread
identifier (TID) used in compartmentalization. These CSRs are listed in
xref:tid-mcsrnames-added[xrefstyle=short],
xref:tid-scsrnames-added[xrefstyle=short],
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