Skip to content

Commit

Permalink
Pushing vector support for basic vadd.vv and vsub.vv, lmul, UOPs gene…
Browse files Browse the repository at this point in the history 
…ration, and vset
  • Loading branch information
@aarongchan
aarongchan committed May 6, 2024
1 parent a0f965f commit cd9b060
Show file tree
Hide file tree
Showing 20 changed files with 1,048 additions and 830 deletions.
46 changes: 30 additions & 16 deletions arches/big_core.yaml
View file
Original file line number Diff line number Diff line change
Expand Up @@ -11,6 +11,7 @@ top.cpu.core0:
rename.params.num_to_rename: 8
rename.params.num_integer_renames: 64
rename.params.num_float_renames: 64
rename.params.num_vector_renames: 64
dispatch.params.num_to_dispatch: 8
rob.params.num_to_retire: 8
dcache.params:
Expand All @@ -32,7 +33,8 @@ top.cpu.core0.extension.core_extensions:
["float", "faddsub", "fmac"], # exe6
["float", "f2i"], # exe7
["br"], # exe8
["br"] # exe9
["br"], # exe9
["vint", "vset"]
]
# this is used to set how many units per queue
# ["0", "3"] means iq0 has exe0, exe1, exe2, and exe3, so it's inclusive
Expand All @@ -47,25 +49,37 @@ top.cpu.core0.extension.core_extensions:
["2", "3"], # iq1 -> exe2, exe3
["4", "5"], # iq2 -> exe4, exe5
["6", "7"], # iq3 -> exe6, exe7
["8", "9"] # iq4 -> exe8, exe9
["8", "9"], # iq4 -> exe8, exe9
["10"] # iq5 -> exe10
]
top.cpu.core0.rename.scoreboards:
# From
# |
# V
integer.params.latency_matrix: |
[["", "lsu", "iq0", "iq1", "iq2", "iq3", "iq4"],
["lsu", 1, 1, 1, 1, 1, 1],
["iq0", 1, 1, 1, 1, 1, 1],
["iq1", 1, 1, 1, 1, 1, 1],
["iq2", 1, 1, 1, 1, 1, 1],
["iq3", 1, 1, 1, 1, 1, 1],
["iq4", 1, 1, 1, 1, 1, 1]]
[["", "lsu", "iq0", "iq1", "iq2", "iq3", "iq4", "iq5"],
["lsu", 1, 1, 1, 1, 1, 1, 1],
["iq0", 1, 1, 1, 1, 1, 1, 1],
["iq1", 1, 1, 1, 1, 1, 1, 1],
["iq2", 1, 1, 1, 1, 1, 1, 1],
["iq3", 1, 1, 1, 1, 1, 1, 1],
["iq4", 1, 1, 1, 1, 1, 1, 1],
["iq5", 1, 1, 1, 1, 1, 1, 1]]
float.params.latency_matrix: |
[["", "lsu", "iq0", "iq1", "iq2", "iq3", "iq4"],
["lsu", 1, 1, 1, 1, 1, 1],
["iq0", 1, 1, 1, 1, 1, 1],
["iq1", 1, 1, 1, 1, 1, 1],
["iq2", 1, 1, 1, 1, 1, 1],
["iq3", 1, 1, 1, 1, 1, 1],
["iq4", 1, 1, 1, 1, 1, 1]]
[["", "lsu", "iq0", "iq1", "iq2", "iq3", "iq4", "iq5"],
["lsu", 1, 1, 1, 1, 1, 1, 1],
["iq0", 1, 1, 1, 1, 1, 1, 1],
["iq1", 1, 1, 1, 1, 1, 1, 1],
["iq2", 1, 1, 1, 1, 1, 1, 1],
["iq3", 1, 1, 1, 1, 1, 1, 1],
["iq4", 1, 1, 1, 1, 1, 1, 1],
["iq5", 1, 1, 1, 1, 1, 1, 1]]
vector.params.latency_matrix: |
[["", "lsu", "iq0", "iq1", "iq2", "iq3", "iq4", "iq5"],
["lsu", 1, 1, 1, 1, 1, 1, 1],
["iq0", 1, 1, 1, 1, 1, 1, 1],
["iq1", 1, 1, 1, 1, 1, 1, 1],
["iq2", 1, 1, 1, 1, 1, 1, 1],
["iq3", 1, 1, 1, 1, 1, 1, 1],
["iq4", 1, 1, 1, 1, 1, 1, 1],
["iq5", 1, 1, 1, 1, 1, 1, 1]]
27 changes: 27 additions & 0 deletions arches/isa_json/olympia_uarch_rv64v.json
View file
Original file line number Diff line number Diff line change
@@ -0,0 +1,27 @@
[
{
"mnemonic": "vadd.vv",
"pipe" : "vint",
"latency" : 1
},
{
"mnemonic": "vsub.vv",
"pipe" : "vint",
"latency" : 1
},
{
"mnemonic": "vsetvli",
"pipe": "vset",
"latency": 1
},
{
"mnemonic": "vsetvl",
"pipe": "vset",
"latency": 1
},
{
"mnemonic": "vsetivli",
"pipe": "vset",
"latency": 1
}
]
Loading

0 comments on commit cd9b060

Please sign in to comment.