Rebased, vlsu test

riscv-software-src · Aug 1, 2024 · b371d6f · b371d6f
1 parent 1adf72f
commit b371d6f
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Showing 5 changed files with 136 additions and 105 deletions.
diff --git a/core/MemoryAccessInfo.hpp b/core/MemoryAccessInfo.hpp
@@ -270,7 +270,7 @@ namespace olympia
 
     inline std::ostream & operator<<(std::ostream & os, const olympia::MemoryAccessInfo & mem)
     {
-        os << "memptr: " << mem.getInstPtr() << " " << mem.getVAddr();
+        os << "memptr: " << mem.getInstPtr() << " vaddr: " << mem.getVAddr();
         return os;
     }
 

diff --git a/core/ROB.cpp b/core/ROB.cpp
@@ -136,6 +136,9 @@ namespace olympia
                 // UPDATE:
                 ex_inst.setStatus(Inst::Status::RETIRED);
                 if (ex_inst.isStoreInst() && !ex_inst.isVector()) {
+                    // We don't send signal back for vector because
+                    // statuses are held by load_store_info_ptr, not inst_ptr
+                    // like in LSU
                     out_rob_retire_ack_.send(ex_inst_ptr);
                 }