Added more vec uop gen testing and fixed transfer scalar sources

riscv-software-src · Jul 17, 2024 · 47ab576 · 47ab576
1 parent 8ae2465
commit 47ab576
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Showing 6 changed files with 84 additions and 8 deletions.
diff --git a/core/VectorUopGenerator.cpp b/core/VectorUopGenerator.cpp
@@ -111,6 +111,12 @@ namespace olympia
         auto srcs = current_inst_->getSourceOpInfoList();
         for (auto & src : srcs)
         {
+            // Do not increment scalar sources for transfer instructions
+            if (src.operand_type != mavis::InstMetaData::OperandTypes::VECTOR)
+            {
+                continue;
+            }
+
             if constexpr (WIDE_DEST == true)
             {
                 // Only increment source values for even uops

diff --git a/test/core/vector/CMakeLists.txt b/test/core/vector/CMakeLists.txt
@@ -12,9 +12,11 @@ file(CREATE_LINK ${CMAKE_CURRENT_SOURCE_DIR}/vsetivli_vaddvv.json      ${CMAKE_C
 file(CREATE_LINK ${CMAKE_CURRENT_SOURCE_DIR}/vsetvli_vaddvv.json       ${CMAKE_CURRENT_BINARY_DIR}/vsetvli_vaddvv.json SYMBOLIC)
 file(CREATE_LINK ${CMAKE_CURRENT_SOURCE_DIR}/vsetvl_vaddvv.json        ${CMAKE_CURRENT_BINARY_DIR}/vsetvl_vaddvv.json SYMBOLIC)
 file(CREATE_LINK ${CMAKE_CURRENT_SOURCE_DIR}/vsetivli_vaddvv_tail.json ${CMAKE_CURRENT_BINARY_DIR}/vsetivli_vaddvv_tail.json SYMBOLIC)
-file(CREATE_LINK ${CMAKE_CURRENT_SOURCE_DIR}/multiple_vset.json      ${CMAKE_CURRENT_BINARY_DIR}/multiple_vset.json SYMBOLIC)
-file(CREATE_LINK ${CMAKE_CURRENT_SOURCE_DIR}/add_vmulvx.json         ${CMAKE_CURRENT_BINARY_DIR}/add_vmulvx.json SYMBOLIC)
-file(CREATE_LINK ${CMAKE_CURRENT_SOURCE_DIR}/vrgather.json           ${CMAKE_CURRENT_BINARY_DIR}/vrgather.json SYMBOLIC)
+file(CREATE_LINK ${CMAKE_CURRENT_SOURCE_DIR}/multiple_vset.json        ${CMAKE_CURRENT_BINARY_DIR}/multiple_vset.json SYMBOLIC)
+file(CREATE_LINK ${CMAKE_CURRENT_SOURCE_DIR}/vmulvx.json               ${CMAKE_CURRENT_BINARY_DIR}/vmulvx.json SYMBOLIC)
+file(CREATE_LINK ${CMAKE_CURRENT_SOURCE_DIR}/vwmulvv.json              ${CMAKE_CURRENT_BINARY_DIR}/vwmulvv.json SYMBOLIC)
+file(CREATE_LINK ${CMAKE_CURRENT_SOURCE_DIR}/vmseqvv.json              ${CMAKE_CURRENT_BINARY_DIR}/vmseqvv.json SYMBOLIC)
+file(CREATE_LINK ${CMAKE_CURRENT_SOURCE_DIR}/vrgather.json             ${CMAKE_CURRENT_BINARY_DIR}/vrgather.json SYMBOLIC)
 
 
 
@@ -23,5 +25,7 @@ sparta_named_test(Vector_test_vsetvli       Vector_test big_core.out -c test_cor
 sparta_named_test(Vector_test_vsetvl        Vector_test big_core.out -c test_cores/test_big_core_full.yaml --input-file vsetvl_vaddvv.json)
 sparta_named_test(Vector_test_vsetivli_tail Vector_test big_core.out -c test_cores/test_big_core_full.yaml --input-file vsetivli_vaddvv_tail.json)
 #sparta_named_test(Vector_test_multiple_vset Vector_test big_core.out -c test_cores/test_big_core_full.yaml --input-file multiple_vset.json)
-sparta_named_test(Vector_test_add_vmulvx    Vector_test big_core.out -c test_cores/test_big_core_full.yaml --input-file add_vmulvx.json)
+sparta_named_test(Vector_test_vmulvx    Vector_test big_core.out -c test_cores/test_big_core_full.yaml --input-file vmulvx.json)
+sparta_named_test(Vector_test_vmulvv        Vector_test big_core.out -c test_cores/test_big_core_full.yaml --input-file vwmulvv.json)
+sparta_named_test(Vector_test_vmseqvv       Vector_test big_core.out -c test_cores/test_big_core_full.yaml --input-file vmseqvv.json)
 sparta_named_test(Vector_unsupported_test   Vector_test big_core.out -c test_cores/test_big_core_full_8_decode.yaml --input-file vrgather.json)
diff --git a/test/core/vector/Vector_test.cpp b/test/core/vector/Vector_test.cpp
@@ -246,23 +246,49 @@ void runTests(int argc, char **argv)
     {
         cls.runSimulator(&sim);
 
-        // Test Decode
+        // Test Decode (last vset)
         decode_tester.test_waiting_on_vset(false);
         decode_tester.test_lmul(1);
         decode_tester.test_vl(128);
         decode_tester.test_vta(false);
         decode_tester.test_sew(32);
         decode_tester.test_vlmax(32);
     }
-    else if(input_file.find("add_vmulvx.json") != std::string::npos)
+    else if(input_file.find("vmulvx.json") != std::string::npos)
+    {
+        cls.runSimulator(&sim);
+
+        // Test Retire
+        rob_tester.test_num_insts_retired(3);
+        // vadd + 4 vmul.vx uop
+        rob_tester.test_num_uops_retired(6);
+        rob_tester.test_last_inst_has_tail(false);
+
+        // TODO: Test source values for all uops
+    }
+    else if(input_file.find("vwmulvv.json") != std::string::npos)
     {
         cls.runSimulator(&sim);
 
         // Test Retire
         rob_tester.test_num_insts_retired(2);
-        // vadd + 1 vmul.vx uop
-        rob_tester.test_num_uops_retired(2);
+        // vadd + 8 vwmul.vv uop
+        rob_tester.test_num_uops_retired(9);
         rob_tester.test_last_inst_has_tail(false);
+
+        // TODO: Test destination values for all uops
+    }
+    else if(input_file.find("vmseqvv.json") != std::string::npos)
+    {
+        cls.runSimulator(&sim);
+
+        // Test Retire
+        rob_tester.test_num_insts_retired(2);
+        // vadd + 4 vmseq.vv uops
+        rob_tester.test_num_uops_retired(5);
+        rob_tester.test_last_inst_has_tail(false);
+
+        // TODO: Test destination values for all uops
     }
     else if(input_file.find("vrgather.json") != std::string::npos)
     {

diff --git a/test/core/vector/vmseqvv.json b/test/core/vector/vmseqvv.json
@@ -0,0 +1,16 @@
+[
+    {
+        "mnemonic": "vsetivli",
+        "rs1": 5,
+        "rd": 1,
+        "vtype": "0x2",
+        "vl": 512,
+        "vta": 0
+    },
+    {
+        "mnemonic": "vmseq.vv",
+        "vd": 12,
+        "vs2": 8,
+        "vs1": 4
+    }
+]
diff --git a/test/core/vector/add_vmulvx.json → test/core/vector/vmulvx.json b/test/core/vector/add_vmulvx.json → test/core/vector/vmulvx.json
@@ -1,4 +1,12 @@
 [
+    {
+        "mnemonic": "vsetivli",
+        "rs1": 5,
+        "rd": 1,
+        "vtype": "0x2",
+        "vl": 512,
+        "vta": 0
+    },
     {
         "mnemonic": "add",
         "rs1": 1,

diff --git a/test/core/vector/vwmulvv.json b/test/core/vector/vwmulvv.json
@@ -0,0 +1,16 @@
+[
+    {
+        "mnemonic": "vsetivli",
+        "rs1": 5,
+        "rd": 1,
+        "vtype": "0x2",
+        "vl": 512,
+        "vta": 0
+    },
+    {
+        "mnemonic": "vwmul.vv",
+        "vd": 12,
+        "vs2": 8,
+        "vs1": 4
+    }
+]