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CSR tests should emit Zicsr in test ISA string #96

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56fb258
Added corner case for dividing most neg number with -1
alitariq4589 Jun 22, 2023
650fca7
add paired register support for double xlen instructions in zacas ext…
ved-rivos Jul 27, 2023
cef5d73
add double xlen cas format
ved-rivos Jul 27, 2023
ac2ad67
support paired registers - 64 and 128 bits - for zacas
ved-rivos Jul 27, 2023
6cab933
add templates for amocas.w, amocas.d (different for for RV32 and RV64…
ved-rivos Jul 27, 2023
c1a1233
add data generators for zacas
ved-rivos Jul 27, 2023
fcb1996
add zacas cover group files
ved-rivos Jul 27, 2023
d5420e0
Updating CONTRIBUTING.rst to capture the new git strategy
neelgala Aug 20, 2023
ef895d6
Merge pull request #76 from neelgala/dev
neelgala Aug 20, 2023
91393bd
Add cgf file for 32-bit Atomic instructions
Abdulwadoodd Jun 30, 2023
df9d967
Add cgf file for 64-bit Atomic instructions
Abdulwadoodd Jun 30, 2023
13ac924
Add test gen template for 32-bit Atomic instructions
Abdulwadoodd Jun 30, 2023
80aaca2
Add test gen template for 64-bit Atomic instructions
Abdulwadoodd Jun 30, 2023
f400219
Update cgf file
Abdulwadoodd Jul 25, 2023
9bf14f6
Add test cases in RV64
Abdulwadoodd Jul 25, 2023
24c52e7
Update test template
Abdulwadoodd Jul 25, 2023
77a4853
Update cgf files
Abdulwadoodd Aug 3, 2023
10f0cb9
Update changelog entry
Abdulwadoodd Aug 20, 2023
5cc22db
Merge pull request #69 from Abdulwadoodd/atomics_dev
neelgala Aug 21, 2023
6c81542
Added template and cgf for compressed load type instructions
Abdulwadoodd Jun 19, 2023
118969c
Added template and cgf for compressed store type instructions
Abdulwadoodd Jun 19, 2023
3923f65
Added template and cgf for compressed bitmanip instructions
Abdulwadoodd Jun 19, 2023
8e5be82
Add new format for compressed bit manip instructions
Abdulwadoodd Jun 19, 2023
e5a4386
Added template and cgf for c.not and c.mul instructions
Abdulwadoodd Jun 19, 2023
fd740a1
Update Chnagelog
Abdulwadoodd Aug 21, 2023
7843233
Merge pull request #64 from Abdulwadoodd/zc_dev
neelgala Aug 21, 2023
5098df4
Added zifenci and privilege tests ctg files for RV32E
EmanFatima-ef Aug 10, 2023
b810532
Added Changelog Entry
EmanFatima-ef Aug 10, 2023
c3edb51
Added Bit Manipulation tests for RV32E
EmanFatima-ef Aug 16, 2023
0a26f62
Modify Changelog
EmanFatima-ef Aug 16, 2023
0225a26
Update CHANGELOG.md
EmanFatima-ef Aug 16, 2023
061a665
Update CHANGELOG.md
EmanFatima-ef Aug 21, 2023
94e76e3
Merge branch 'dev' into zacas
ved-rivos Aug 21, 2023
9dac5e7
Merge pull request #74 from EmanFatima-ef/master
neelgala Aug 22, 2023
24a4eb8
Merge pull request #73 from ved-rivos/zacas
neelgala Aug 22, 2023
91f2848
Merge pull request #65 from alitariq4589/alitariq4589/DivMostNegNumWi…
neelgala Aug 22, 2023
04ff804
generator.py updated for the hardcoded register solution
MuhammadHammad001 Sep 9, 2023
0b7c11e
Merge pull request #79 from MuhammadHammad001/hardcode_register
neelgala Sep 21, 2023
cbea7ad
include Zicsr for CSR test ISA
ved-rivos Dec 28, 2023
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25 changes: 25 additions & 0 deletions .github/pull_request_template.md
Original file line number Diff line number Diff line change
@@ -0,0 +1,25 @@
<FOR DOC UPDATES FILL ONLY DESCRIPTION AND RELATED ISSUES SECTION AND REMOVE THE OTHERS>

#DEVELOPMENT PRs SHOULD BE TO DEV BRANCH ONLY

## Description

> Provide a detailed description of the changes performed by the PR.

### Related Issues

> Please list all the issues related to this PR. Use NA if no issues exist.

### Update to/for Ratified/Unratified Extensions or to framework

- [ ] Ratified
- [ ] Unratified
- [ ] Framework

### List Extensions

> List the extensions that your PR affects. In case of unratified extensions, please provide a link to the spec draft that was referred to make this PR.

### Mandatory Checklist:

- [ ] Make sure to have created a suitable entry in the CHANGELOG.md under `[WIP-DEV]` section.
11 changes: 11 additions & 0 deletions CHANGELOG.md
Original file line number Diff line number Diff line change
Expand Up @@ -2,6 +2,17 @@

This project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).

Please note the header `WIP-DEV` is to always remain indicating the changes done on the dev branch.
Only when a release to the main branch is done, the contents of the WIP-DEV are put under a
versioned header while the `WIP-DEV` is left empty

## [WIP-DEV]
- Added Zifencei, Bit Manipulation and Privilege tests ctg files for RV32E
- Added support of Zcb from Code Size Reduction Extension.
- Added support of Standard Atomic (A) Extension (RV32 and RV64), excluding the LR/SC instruction.
- Updating CONTRIBUTING.rst to capture the new git strategy adopted to follow a monthly release
cadence.

## [0.11.1] - 2023-08-15
- Fixed hex values handling for K extensions
- Fixed set indexing error during opcomb gen
Expand Down
71 changes: 50 additions & 21 deletions CONTRIBUTING.rst
Original file line number Diff line number Diff line change
Expand Up @@ -2,9 +2,9 @@

.. highlight:: shell

============
Contributing
============
======================
Developer Contribution
======================

Contributions are welcome, and they are greatly appreciated and credit will always be given.

Expand All @@ -30,15 +30,31 @@ If you are proposing a feature:
* Remember that this is a volunteer-driven project, and that contributions
are welcome :)

Git Strategy
------------

The repo adopts a simple git strategy where all contributions to the repo are made to the ``dev``
branch (i.e. all Pull-Requests must use ``dev`` as the target branch). On a monthly cadence (decided
and controlled by the SIG-ARCH-TEST members) the ``dev`` branch will be merged to the ``main`` to by
the official maintainers of the repo. This will create an official release capturing all the
development over the month into a single release.

To implement the above strategy successfully the following needs be followed:

* Developers: All pull-requests from developers must target the ``dev`` branch and the PR must
contain an entry in the CHANGELOG.md file under `[WIP-DEV]` section.
* Maintainers: When a making a release the maintainers shall assign semantic version number by
updating the CHANGELOG and the respective python files before raising a PR from the `dev` to `main`.

Get Started!
------------

Ready to contribute? Here's how to set up `riscv_ctg` for local development.

1. Fork the `riscv_ctg` repo on GitHub.
2. Clone your fork locally::
2. Clone your fork locally and checkout the ``dev`` branch::

$ git clone https://github.com/riscv-software-src/riscv-ctg.git
$ git clone https://github.com/riscv-software-src/riscv-ctg.git -b dev

3. Create an issue and WIP merge request that creates a working branch for you::

Expand All @@ -58,33 +74,46 @@ Ready to contribute? Here's how to set up `riscv_ctg` for local development.
$ git commit -m "Your detailed description of your changes."
$ git push origin name-of-your-bugfix-or-feature

6. Submit a merge request through the GitHub website.
6. Submit a pull-request through the GitHub website. Make sure the pull-request is on the `dev`
branch of the origin repo.

7. Do not forget to make an entry in the CHANGELOG.md file under the `[WIP-DEV]` section
highlighting the changes you have done.

Merge Request Guidelines
----------------------------
------------------------

Before you submit a merge request, check that it meets these guidelines:

1. The merge request should include tests.
1. The merge request should include tests (if any).
2. If the merge request adds functionality, the docs should be updated.
3. The merge request should work for Python 3.6, 3.7 and 3.8, and for PyPy.
and make sure that the tests pass for all supported Python versions.
3. The target branch must always be the `dev` branch.


Versioning (only for maintainers)
---------------------------------

When issuing pull requests to the main branch (from dev), a version entry in the CHANGELOG.md is mandatory. The tool adheres to
the [`Semantic Versioning`](https://semver.org/spec/v2.0.0.html) scheme. Following guidelines must
be followed while assigning a new version number :

- Patch-updates: all doc updates (like typos, more clarification,etc).
- Minor-updates: Fixing bugs in current features, adding new features which do not break current
features or working. Adding new extensions.
- Major-updates: Backward incompatible changes.

Tips
----
Note: You can have either a patch or minor or major update.
Note: In case of a conflict, the maintainers will decide the final version to be assigned.

To run a subset of tests::
To update the version of the python package for deployment you can use `bumpversion` (installed
using ``pip install bumpversion``)::

$ pytest tests.test_riscv_ctg
$ bumpversion --no-tag --config-file setup.cfg patch # last arg can be: major or minor or patch

If you don't have bumpversion installed you can manually update the version in the following files:

Deploying
---------
- change the value of variable ``current_version`` in `./setup.cfg`
- change the value of variable ``__version__`` in `./riscv_ctg/__init__.py`

A reminder for the maintainers on how to deploy.
Make sure all your changes are committed.
Then run::

$ bumpversion --no-tag --config-file setup.cfg patch # possible: major / minor / patch
$ git push origin name-of-your-branch

5 changes: 3 additions & 2 deletions riscv_ctg/cross_comb.py
Original file line number Diff line number Diff line change
Expand Up @@ -51,7 +51,8 @@
'pphrrformat' : '$instr $rd, $rs1, $rs2',
'ppbrrformat' : '$instr $rd, $rs1, $rs2',
'prrformat' : '$instr ',
'prrrformat' : '$instr'
'prrrformat' : '$instr',
'dcasrformat' : '$instr '
}
'''Dictionary to store instruction formats'''

Expand Down Expand Up @@ -497,4 +498,4 @@ def write_test(self, fprefix, cgf_node, usage_str, cov_label, full_solution):
label = cov_label,
extension = extension
)
)
)
2 changes: 1 addition & 1 deletion riscv_ctg/csr_comb.py
Original file line number Diff line number Diff line change
Expand Up @@ -260,7 +260,7 @@ class GeneratorCSRComb():
'''

def __init__(self, base_isa, xlen, randomize):
self.base_isa = base_isa
self.base_isa = base_isa + "_Zicsr"
self.xlen = xlen
self.randomize = randomize

Expand Down
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