make fix

Signed-off-by: Qinghao Shi <[email protected]>
riscv-non-isa · Jun 11, 2024 · a2f5a26 · a2f5a26
1 parent 7137e17
commit a2f5a26
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diff --git a/.github/isa_templates/RV32IMCZicsr_Zifencei.yaml b/.github/isa_templates/RV32IMCZicsr_Zifencei.yaml
@@ -1,6 +1,6 @@
 hart_ids: [0]
 hart0:
-  ISA: RV32IMCFDZicsr_Zifencei
+  ISA: RV32IMFDCZicsr_Zifencei
   physical_addr_sz: 32
   User_Spec_Version: '2.3'
   supported_xlen: [32]

diff --git a/.github/isa_templates/RV64IMCZicsr_Zifencei.yaml b/.github/isa_templates/RV64IMCZicsr_Zifencei.yaml
@@ -1,6 +1,6 @@
 hart_ids: [0]
 hart0:
-  ISA: RV64IMCFDZicsr_Zifencei
+  ISA: RV64IMFDCZicsr_Zifencei
   physical_addr_sz: 32
   User_Spec_Version: '2.3'
   supported_xlen: [64]